SCPS199D August   2014  – October 2016 TCA9538

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Requirements
    7. 6.7 RESET Timing Requirements
    8. 6.8 Switching Characteristics
    9. 6.9 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 I/O Port
      2. 8.3.2 Interrupt Output (INT)
      3. 8.3.3 RESET Input
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-On Reset
    5. 8.5 Programming
      1. 8.5.1 I2C Interface
    6. 8.6 Register Map
      1. 8.6.1 Device Address
      2. 8.6.2 Control Register and Command Byte
      3. 8.6.3 Register Descriptions
        1. 8.6.3.1 Bus Transactions
          1. 8.6.3.1.1 Writes
          2. 8.6.3.1.2 Reads
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Minimizing ICC When I/Os Control LEDs
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power-On Reset Requirements
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

10 Power Supply Recommendations

10.1 Power-On Reset Requirements

In the event of a glitch or data corruption, the TCA9538 can be reset to its default conditions by using the power-on reset feature. Power-on reset requires that the device go through a power cycle to be completely reset. This reset also happens when the device is powered on for the first time in an application.

The two types of power-on reset are shown in and Figure 29.

TCA9538 pwron02_cps204.gif Figure 29. VCC is Lowered Below the POR Threshold, Then Ramped Back Up to VCC

Table 8 specifies the performance of the power-on reset feature for the TCA9538 for both types of power-on reset.

Table 8. Recommended Supply Sequencing And Ramp Rates(1)

PARAMETER MIN MAX UNIT
VCC_FT Fall rate See Figure 29 1 ms
VCC_RT Rise rate See Figure 29 0.1 ms
VCC_TRR Time to re-ramp (when VCC drops to VPOR_MIN – 50 mV or when VCC drops to GND) See Figure 29 2 μs
VCC_GH Level that VCC can glitch down to, but not cause a functional disruption when VCC_GW = 1 µs See Figure 30 1.2 V
VCC_GW Glitch width that does not cause a functional disruption when VCC_GH = 0.5 × VCC (For VCC > 3 V) See Figure 30 10 μs
(1) All supply sequencing and ramp rate values are measured at TA = 25°C

Glitches in the power supply can also affect the power-on reset performance of this device. The glitch width (VCC_GW) and height (VCC_GH) are dependent on each other. The bypass capacitance, source impedance, and device impedance are factors that affect power-on reset performance. Figure 30 and Table 8 provide more information on how to measure these specifications.

TCA9538 pwron03_cps199.gif Figure 30. Glitch Width and Glitch Height

VPOR is critical to the power-on reset. VPOR is the voltage level at which the reset condition is released and all the registers and the I2C/SMBus state machine are initialized to their default states. The value of VPOR differs based on the VCC being lowered to or from 0. Figure 31 and Table 8 provide more details on this specification.

TCA9538 pwron04_cps199.gif Figure 31. VPOR