Data is transmitted to the TCAL6416R by sending the device address and setting the least-significant bit (LSB) to a logic 0 (see Figure 7-7 for device address). The command byte is sent after the address and determines which register receives the data that follows the command byte. There is no limitation on the number of data bytes sent in one write transmission.

Twenty-two registers within the TCAL6416R are configured to operate as eleven register pairs. The eleven pairs are input port, output port, polarity inversion, configuration, output drive strength (two 16-bit registers), input latch, pull-up/pull-down enable, pull-up/pulldown selection, interrupt mask, and interrupt status registers. After sending data to one register, the next data byte is sent to the other register in the pair (see Figure 7-9 and Figure 7-10). For example, if the first byte is sent to Output Port 1 (register 3), the next byte is stored in Output Port 0 (register 2).

There is no limitation on the number of data bytes sent in one write transmission. In this way, each 8-bit register pair may be updated independently of the other registers.

Figure 7-9 Write to Output Port Registers

Figure 7-10 Write to Configuration Registers