JAJSV04A July   2024  – November 2024 TCAN1043N-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  ESD Ratings - IEC Specifications
    4. 5.4  Recommended Operating Conditions
    5. 5.5  Thermal Information
    6. 5.6  Power Dissipation Ratings
    7. 5.7  Power Supply Characteristics
    8. 5.8  Electrical Characteristics
    9. 5.9  Timing Requirements
    10. 5.10 Switching Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Supply Pins
        1. 7.3.1.1 VSUP Pin
        2. 7.3.1.2 VCC Pin
        3. 7.3.1.3 VIO Pin
      2. 7.3.2 Digital Inputs and Outputs
        1. 7.3.2.1 TXD Pin
        2. 7.3.2.2 RXD Pin
        3. 7.3.2.3 nFAULT Pin
        4. 7.3.2.4 EN Pin
        5. 7.3.2.5 nSTB Pin
      3. 7.3.3 GND
      4. 7.3.4 INH Pin
      5. 7.3.5 WAKE Pin
      6. 7.3.6 CAN Bus Pins
      7. 7.3.7 Faults
        1. 7.3.7.1 Internal and External Fault Indicators
          1. 7.3.7.1.1 Power-Up (PWRON Flag)
          2. 7.3.7.1.2 Wake-Up Request (WAKERQ Flag)
          3. 7.3.7.1.3 Undervoltage Faults
            1. 7.3.7.1.3.1 Undervoltage on VSUP
            2. 7.3.7.1.3.2 Undervoltage on VCC
            3. 7.3.7.1.3.3 Undervoltage on VIO
          4. 7.3.7.1.4 CAN Bus Fault (CBF Flag)
          5. 7.3.7.1.5 TXD Dominant State Timeout (TXDDTO Flag)
          6. 7.3.7.1.6 TXD Shorted to RXD Fault (TXDRXD Flag)
          7. 7.3.7.1.7 CAN Bus Dominant Fault (CANDOM Flag)
      8. 7.3.8 Local Faults
        1. 7.3.8.1 TXD Dominant Timeout (TXD DTO)
        2. 7.3.8.2 Thermal Shutdown (TSD)
        3. 7.3.8.3 Undervoltage Lockout (UVLO)
        4. 7.3.8.4 Unpowered Devices
        5. 7.3.8.5 Floating Terminals
        6. 7.3.8.6 CAN Bus Short-Circuit Current Limiting
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operating Mode Description
        1. 7.4.1.1 Normal Mode
        2. 7.4.1.2 Silent Mode
        3. 7.4.1.3 Standby Mode
        4. 7.4.1.4 Go-To-Sleep Mode
        5. 7.4.1.5 Sleep Mode
          1. 7.4.1.5.1 Remote Wake Request via Wake-Up Pattern (WUP)
          2. 7.4.1.5.2 Local Wake-Up (LWU) via WAKE Input Terminal
      2. 7.4.2 CAN Transceiver
        1. 7.4.2.1 CAN Transceiver Operation
          1. 7.4.2.1.1 CAN Transceiver Modes
            1. 7.4.2.1.1.1 CAN Off Mode
            2. 7.4.2.1.1.2 CAN Autonomous: Inactive and Active
            3. 7.4.2.1.1.3 CAN Active
          2. 7.4.2.1.2 Driver and Receiver Function Tables
          3. 7.4.2.1.3 CAN Bus States
  9. 8 Application Information Disclaimer
    1. 8.1 Application Information
      1. 8.1.1 Typical Application
      2. 8.1.2 Design Requirements
        1. 8.1.2.1 Bus Loading, Length and Number of Nodes
      3. 8.1.3 Detailed Design Procedure
        1. 8.1.3.1 CAN Termination
      4. 8.1.4 Application Curves
    2. 8.2 Power Supply Recommendations
    3. 8.3 Layout
      1. 8.3.1 Layout Guidelines
      2. 8.3.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.3.8.6 CAN Bus Short-Circuit Current Limiting

The TCAN1043N-Q1 has several protection features that limit the short-circuit current when a CAN bus line is shorted. The features include CAN driver current limiting in the dominant and recessive states, and TXD dominant state timeout which prevents permanently having the higher short-circuit current of a dominant state in a system fault.

During CAN communication, the bus switches between the dominant and recessive states. Thus, the short-circuit current may be viewed either as the current during each bus state or as an average current. The average short-circuit current can be used when considering system power for the termination resistors and common-mode choke. The percentage of time that the driver can be dominant is limited by the TXD dominant state timeout and the CAN protocol which has forced state changes and recessive bits such as bit stuffing, control fields, and interframe spacing. These make sure there is a minimum recessive time on the bus even if the data field contains a high percentage of dominant bits.

The short-circuit current of the bus depends on the ratio of recessive to dominant bits and the respective short-circuit currents. The average short-circuit current may be calculated using Equation 2.

Equation 2. IOS(AVG) = %Transmit × [(%REC_Bits × IOS(SS)_REC) + (%DOM_Bits × IOS(SS)_DOM)] + [%Receive × IOS(SS)_REC]

Where:

  • IOS(AVG) is the average short-circuit current
  • %Transmit is the percentage the node is transmitting CAN messages
  • %Receive is the percentage the node is receiving CAN messages
  • %REC_Bits is the percentage of recessive bits in the transmitted CAN messages
  • %DOM_Bits is the percentage of dominant bits in the transmitted CAN messages
  • IOS(SS)_REC is the recessive steady state short-circuit current
  • IOS(SS)_DOM is the dominant steady state short-circuit current

The short-circuit current and possible fault cases of the network should be taken into consideration when sizing the power ratings of the termination resistance and other network components.