JAJSV18 July 2024 TCAN1473A-Q1
ADVANCE INFORMATION
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
MIN | MAX | UNIT | ||
---|---|---|---|---|
VSUP | Supply voltage(2) | –0.3 | 45 | V |
VCC | Supply voltage | –0.3 | 6 | V |
VIO | Supply voltage I/O level shifter | –0.3 | 6 | V |
VBUS | CAN bus I/O voltage (CANH, CANL) | –58 | 58 | V |
VDIFF | CAN bus differential voltage (VDIFF = VCANH - VCANL) | -58 | 58 | V |
VWAKE | WAKE input voltage | –45 | 45 and VI ≤ VSUP+0.3 | V |
VINH | INH pin voltage | -0.3 | 45 and VO ≤ VSUP+0.3 | V |
VLOGIC | Logic pin voltage | –0.3 | 6 | V |
IO(LOGIC) | Logic pin output current | 8 | mA | |
IO(INH) | Inhibit pin output current | 6 | mA | |
IO(WAKE) | WAKE pin output current | 3 | mA | |
TJ | Junction temperature | –40 | 165 | °C |
TSTG | Storage temperature | –65 | 150 | °C |