JAJSEB2
December 2017
TCAN4420
PRODUCTION DATA.
1
特長
2
アプリケーション
3
概要
Device Images
機能ブロック図
4
改訂履歴
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
ESD Ratings Specifications
6.4
Recommended Operating Conditions
6.5
Thermal Information
6.6
Power Supply Characteristics
6.7
AC and DC Electrical Characteristics
6.8
Timing Requirements
6.9
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagrams
8.3
Feature Description
8.3.1
TXD Dominant Time Out (DTO)
8.3.2
CAN Bus Short Circuit Current Limiting
8.3.3
Thermal Shutdown
8.3.4
Under Voltage Lockout (UVLO) and Unpowered Device
8.3.4.1
VIO Supply PIN
8.4
Device Functional Modes
8.4.1
Polarity Configuration
8.4.2
Normal Polarity Mode
8.4.3
Reverse Polarity Mode
8.4.4
Driver and Receiver Function
8.4.5
Floating Terminals
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.1.1
Bus Loading, Length and Number of Nodes
9.2.2
Detailed Design Procedure
9.2.2.1
CAN Termination
9.2.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
デバイスおよびドキュメントのサポート
12.1
デバイス・サポート
12.1.1
デバイスの項目表記
12.2
ドキュメントの更新通知を受け取る方法
12.3
コミュニティ・リソース
12.4
商標
12.5
静電気放電に関する注意事項
12.6
Glossary
13
メカニカル、パッケージ、および注文情報
パッケージ・オプション
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
メカニカル・データ(パッケージ|ピン)
D|8
サーマルパッド・メカニカル・データ
発注情報
jajseb2_oa
jajseb2_pm
7
Parameter Measurement Information
Figure 6.
Bus States (Physical Bit Representation)
Figure 7.
Common Mode Bias Unit and Receiver
Figure 8.
Supply Test Circuit
Figure 9.
Driver Test Circuit and Measurement
Figure 10.
Receiver Test Circuit and Measurement
Figure 11.
UV Re-enable Time after UV Event
Figure 12.
Transmitter and Receiver Timing Behavior Test Circuit and Measurement
Figure 13.
TXD_INT Dominant Time Out Test Circuit and Measurement
Figure 14.
Driver Short-Circuit Current Test and Measurement