8.3.2 CAN Bus Short Circuit Current Limiting

The TCAN4420 has several protection features that limit the short circuit current when a CAN bus line is shorted. These include CAN driver current limiting (dominant and recessive). During CAN communication the bus switches between dominant and recessive states, thus the short circuit current may be viewed either as the current during each bus state or as a DC average current. For system current and power considerations in the termination resistors and common mode choke ratings the average short circuit current should be used. The percentage dominant is limited by the TXD dominant time out and CAN protocol which has forced state changes and recessive bits such as bit stuffing, control fields, and inter frame space. These ensure there is a minimum recessive amount of time on the bus even if the data field contains a high percentage of dominant bits.

The short circuit current of the bus depends on the ratio of recessive to dominant bits and their respective short circuit currents. The average short circuit current may be calculated using Equation 1.

Where:

• I_OS(AVG) is the average short circuit current
• %Transmit is the percentage the node is transmitting CAN messages
• %Receive is the percentage the node is receiving CAN messages
• %REC_Bits is the percentage of recessive bits in the transmitted CAN messages
• %DOM_Bits is the percentage of dominant bits in the transmitted CAN messages,
• I_{OS(SS)_REC} is the recessive steady state short circuit current
• I_{OS(SS)_DOM} is the dominant steady state short circuit current.