JAJSE41G June 2016 – March 2019 TDA3LA , TDA3LX , TDA3MA , TDA3MD , TDA3MV
PRODUCTION DATA.
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
NOTE
For more information, see Power, Reset and Clock Management / PRCM Subsystem Environment / External Voltage Inputs or Initialization / Preinitialization / Power Requirements section of the Device TRM.
NOTE
The index number 1 which is part of the EMIF1 signal prefixes (ddr1_*) listed in Section 4.4.8, External Memory Interface (EMIF), column "SIGNAL NAME" are not to be confused with DDR1 type of SDRAM memories.
NOTE
Audio Back End (ABE) module is not supported for this family of devices, but “ABE” name is still present in some clock or DPLL names.
CAUTION
All IO Cells are NOT Fail-safe compliant and should not be externally driven in absence of their IO supply.