JAJSE41G June 2016 – March 2019 TDA3LA , TDA3LX , TDA3MA , TDA3MD , TDA3MV
PRODUCTION DATA.
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
Table 7-13 and Table 7-14 assume testing over the recommended operating conditions and electrical characteristic conditions below (see Figure 7-19 through Figure 7-22).
NO. | PARAMETER | DESCRIPTION | MIN | MAX | UNIT | |
---|---|---|---|---|---|---|
GNF12 | tacc(DAT) | Data maximum access time (GPMC_FCLK Cycles) | J | cycles | ||
- | tsu(DV-OEH) | Setup time, read gpmc_ad[15:0] valid before gpmc_oen_ren high | 1.9 | ns | ||
- | - | th(OEH-DV) | Hold time, read gpmc_ad[15:0] valid after gpmc_oen_ren high | 1 | ns |
NO. | PARAMETER | DESCRIPTION | MIN | MAX | UNIT | |
---|---|---|---|---|---|---|
- | tr(DO) | Rising time, gpmc_ad[15:0] output data | 0.447 | 4.067 | ns | |
- | - | tf(DO) | Fallling time, gpmc_ad[15:0] output data | 0.43 | 4.463 | ns |
GNF0 | tw(nWEV) | Pulse duration, gpmc_wen valid time | A (1) | ns | ||
GNF1 | td(nCSV-nWEV) | Delay time, gpmc_cs[7:0] valid to gpmc_wen valid | B - 0.2 (2) | B + 2.0 (2) | ns | |
GNF2 | td(CLEH-nWEV) | Delay time, gpmc_ben[1:0] high to gpmc_wen valid | C - 0.2 (3) | C + 2.0 (3) | ns | |
GNF3 | td(nWEV-DV) | Delay time, gpmc_ad[15:0] valid to gpmc_wen valid | D - 0.2 (4) | D + 2.0 (4) | ns | |
GNF4 | td(nWEIV-DIV) | Delay time, gpmc_wen invalid to gpmc_ad[15:0] invalid | E - 0.2 (5) | E + 2.0 (5) | ns | |
GNF5 | td(nWEIV-CLEIV) | Delay time, gpmc_wen invalid to gpmc_ben[1:0] invalid | F - 0.2 (6) | F + 2.0 (6) | ns | |
GNF6 | td(nWEIV-nCSIV) | Delay time, gpmc_wen invalid to gpmc_cs[7:0] invalid | G - 0.2 (7) | G + 2.0 (7) | ns | |
GNF7 | td(ALEH-nWEV) | Delay time, gpmc_advn_ale high to gpmc_wen valid | C - 0.2 (3) | C + 2.0 (3) | ns | |
GNF8 | td(nWEIV-ALEIV) | Delay time, gpmc_wen invalid to gpmc_advn_ale invalid | F - 0.2 (6) | F + 2.0 (6) | ns | |
GNF9 | tc(nWE) | Cycle time, write cycle time | H (8) | ns | ||
GNF10 | td(nCSV-nOEV) | Delay time, gpmc_cs[7:0] valid to gpmc_oen_ren valid | I - 0.2 (9) | I + 2.0 (9) | ns | |
GNF13 | tw(nOEV) | Pulse duration, gpmc_oen_ren valid time | K | ns | ||
GNF14 | tc(nOE) | Cycle time, read cycle time | L (10) | ns | ||
GNF15 | td(nOEIV-nCSIV) | Delay time, gpmc_oen_ren invalid to gpmc_cs[7:0] invalid | M - 0.2 (11) | M + 2.0 (11) | ns |
NOTE
To configure the desired virtual mode the user must set MODESELECT bit and DELAYMODE bitfield for each corresponding pad control register.
The pad control registers are presented Table 4-3 and described in Device TRM, Control Module section.