JAJSQ14A february 2023 – august 2023 TDA4AH-Q1 , TDA4AP-Q1 , TDA4VH-Q1 , TDA4VP-Q1
ADVANCE INFORMATION
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
For more details about features and additional description information on the device Multichannel Audio Serial Port, see the corresponding sections within Signal Descriptions and Detailed Description.
Table 7-48 and Figure 7-71 present timing requirements for MCASP0 to MCASP11.
Table 7-47 represents MCASP timing conditions.
PARAMETER | MIN | MAX | UNIT | |
---|---|---|---|---|
INPUT CONDITIONS | ||||
SRI | Input slew rate | 0.7 | 5 | V/ns |
OUTPUT CONDITIONS | ||||
CL | Output load capacitance | 1 | 10 | pF |
PCB CONNECTIVITY REQUIREMENTS | ||||
td(Trace Delay) | Propagation delay of each trace | 100 | 1100 | ps |
td(Trace Mismatch Delay) | Propagation delay mismatch across all traces | 100 | ps |
NO. | MODE(1) | MIN | MAX | UNIT | ||
---|---|---|---|---|---|---|
ASP1 | tc(AHCLKRX) | Cycle time, MCASP[x]_AHCLKR/X | 15.26 | ns | ||
ASP2 | tw(AHCLKRX) | Pulse duration, MCASP[x]_AHCLKR/X high or low | 0.5P(2) - 1.53 | ns | ||
ASP3 | tc(ACLKRX) | Cycle time, MCASP[x]_ACLKR/X | 15.26 | ns | ||
ASP4 | tw(ACLKRX) | Pulse duration, MCASP[x]_ACLKR/X high or low | 0.5R(3) - 1.53 | ns | ||
ASP5 | tsu(AFSRX-ACLKRX) | Setup time, MCASP[x]_AFSR/X input valid before MCASP[x]_ACLKR/X | ACLKR/X int | 12.3 | ns | |
ACLKR/X ext in/out | 4 | |||||
ASP6 | th(ACLKRX-AFSRX) | Hold time, MCASP[x]_AFSR/X input valid after MCASP[x]_ACLKR/X | ACLKR/X int | –1 | ns | |
ACLKR/X ext in/out | 1.6 | |||||
ASP7 | tsu(AXR-ACLKRX) | Setup time, MCASP[x]_AXR input valid before MCASP[x]_ACLKR/X | ACLKR/X int | 12.3 | ns | |
ACLKR/X ext in/out | 4 | |||||
ASP8 | th(ACLKRX-AXR) | Hold time, MCASP[x]_AXR input valid after MCASP[x]_ACLKR/X | ACLKR/X int | -1 | ns | |
ACLKR/X ext in/out | 1.6 |
Table 7-49 and Figure 7-72 present switching characteristics over recommended operating conditions for MCASP0 to MCASP11.
NO. | PARAMETER | DESCRIPTION | MODE(1) | MIN | MAX | UNIT |
---|---|---|---|---|---|---|
ASP9 | tc(AHCLKRX) | Cycle time, MCASP[x]_AHCLKR/X | 20 | ns | ||
ASP10 | tw(AHCLKRX) | Pulse duration, MCASP[x]_AHCLKR/X high or low | 0.5P(2) - 2 | ns | ||
ASP11 | tc(ACLKRX) | Cycle time, MCASP[x]_ACLKR/X | 20 | ns | ||
ASP12 | tw(ACLKRX) | Pulse duration, MCASP[x]_ACLKR/X high or low | 0.5R(3) - 2 | ns | ||
ASP13 | td(ACLKRX-AFSRX) | Delay time, MCASP[x]_ACLKR/X transmit edge to MCASP[x]_AFSR/X output valid | ACLKR/X int | 0 | 7.25 | ns |
ACLKR/X ext in/out | –15.28 | 12.84 | ||||
ASP14 | td(ACLKX-AXR) | Delay time, MCASP[x]_ACLKX transmit edge to MCASP[x]_AXR output valid | ACLKR/X int | 0 | 7.25 | ns |
ACLKR/X ext in/out | –15.28 | 12.84 | ||||
ASP15 | tdis(ACLKX-AXR) | Disable time, MCASP[x]_ACLKX transmit edge to MCASP[x]_AXR output high impedance | ACLKR/X int | 0 | 7.25 | ns |
ACLKR/X ext in/out | –14.9 | 14 |
For more information, see Multichannel Audio Serial Port (MCASP) section in Peripherals chapter in the device TRM.