JAJSIF7K September 2021 – April 2024 TDA4VM , TDA4VM-Q1
PRODUCTION DATA
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Table 6-96, and Figure 6-105 presents switching characteristics for MMC1/2 – UHS-I SDR50 Mode.
NO. | PARAMETER | MIN | MAX | UNIT | |
---|---|---|---|---|---|
fop(clk) | Operating frequency, MMC[x]_CLK | 100 | MHz | ||
SDR505 | tc(clk) | Cycle time, MMC[x]_CLK | 10 | ns | |
SDR506 | tw(clkH) | Pulse duration, MMC[x]_CLK high | 4.45 | ns | |
SDR507 | tw(clkL) | Pulse duration, MMC[x]_CLK low | 4.45 | ns | |
SDR508 | td(clkH-cmdV) | Delay time, MMC[x]_CLK rising edge to MMC[x]_CMD transition | 1.2 | 6.35 | ns |
SDR509 | td(clkH-dV) | Delay time, MMC[x]_CLK rising edge to MMC[x]_DAT[3:0] transition | 1.2 | 6.35 | ns |