JAJSLG1A april 2021 – february 2023 TDES954
PRODUCTION DATA
RX port specific register. The V3Link Port Select register 0x4C configures which unique RX port registers can be accessed by I2C read and write commands.
BIT | FIELD | TYPE | DEFAULT | DESCRIPTION |
---|---|---|---|---|
7:0 | PAR_ERROR _BYTE_0 | R/RC | 0x0 | Number of V3Link parity errors 8 least significant bits. The parity error counter registers return the number of data parity errors that have been detected on the V3Link Receiver data since the last detection of valid lock or last read of the RX_PAR_ERR_LO register. For accurate reading of the parity error count, disable the RX_PARITY_CHECKER_ENABLE bit in register 0x02 prior to reading the parity error count registers. This register is cleared on read. |