SLLSFI6 Data sheet

JAJSOW0A July 2022 – July 2023 TDP1204

PRODUCTION DATA

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）

RNQ|40
- MPQF457A

サーマルパッド・メカニカル・データ

発注情報

8.3.3 Low Power States

The TDP1204 has two low power states: Power Down and Standby. Table 8-21 lists both lower power states. Power down is entered when HPD_IN is low for t_{HPD_PWRDOWN} or in I²C if PD_EN bit is set. Power down is also entered when the EN pin is low. The TDP1204 will exit power down to the standby state when HPD_IN is high for t_{HPD_STANDBY}.

The TDP1204 implements a two stage standby power process when HPD_IN is high.

Stage 1: if there is no signal (electrical idle) on the IN_CLK lane, and if HDMI 1.4/2.0 or IN_D2 if HDMI 2.1, then the TDP1204 will enter Standby State within t_{STANDBY_ENTRY}.

Stage 2: if a signal is detected which last longer than t_{SIGDET_DB}, then TDP1204 will declare a valid signal and exit standby within t_{STANDY_EXIT}.

If a signal is detected, then the TDP1204 will go into normal active operation and signals present at IN_CLK and IN_D[2:0] inputs will be passed through to the OUT_CLK and OUT_D[2:0] outputs.
If it is determined that no signal is present, then the TDP1204 will reenter stage 1.

The TDP1204 will exit standby state and immediately enter active state if LTP1, LTP2, LTP3, or LTP4 is snooped while monitoring status flags at SCDCS offset 41h or 42h.

The TDP1204 will exit normal operation and return to the standby state within t_{STANDBY_ENTRY} anytime electrical idle is detected.

Table 8-21 Power States

	INPUTS					STATUS
EN pin	HPD_IN pin	STANDBY_DISABLE register	HPD_PWRDWN_DISABLE register	PD_EN register	HDMI 1.4/2.0: IN_CLK pin HDMI 2.1: IN_D2 pins	HPD_OUT pin	IN_Dx pins	SDA/SCL	OUT_Dx OUT_CLK	DDC	State
L	X	X	X	X	X	High-Z	High-Z	Disabled	High-Z	Disabled	Power Down State
H	L	X	0	0	X	L	High-Z	Active	High-Z	Disabled	Power Down State
H	X	X	X	1	X	L	High-Z	Active	High-Z	Disabled	Power Down State
H	H	1	X	0	X	HPD_IN	All RX Active	Active	TX Active	Active	Normal operation
H	X	1	1	0	X	H	All RX Active	Active	TX Active	Active	Normal operation
H	H	0	X	0	No signal	HPD_IN	HDMI 1.4/2.0: IN_CLK Active HDMI 2.1: IN_D2 Active	Active	High-Z	Active	Standby State (Squelch waiting)
H	H	0	X	0	Valid signal detected	HPD_IN	All RX Active	Active	TX Active	Active	Normal operation
H	X	0	1	0	No signal	H	HDMI 1.4/2.0: IN_CLK Active HDMI 2.1: IN_D2 Active	Active	High-Z	Active	Standby State (Squelch waiting)
H	X	0	1	0	Valid signal detected	H	All RX Active	Active	TX Active	Active	Normal operation