SNLS766 July   2024 TDP20MB421

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 DC Electrical Characteristics
    6. 5.6 High-Speed Electrical Characteristics
    7. 5.7 SMBUS/I2C Timing Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 5-Level Control Inputs
      2. 6.3.2 Linear Equalization
      3. 6.3.3 Flat Gain
    4. 6.4 Device Functional Modes
      1. 6.4.1 Active Mode
      2. 6.4.2 Standby Mode
    5. 6.5 Programming
      1. 6.5.1 Pin Mode
      2. 6.5.2 SMBUS/I2C Register Control Interface
        1. 6.5.2.1 Shared Registers
        2. 6.5.2.2 Channel Registers
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 DP 2.1 Mainlink Signal Conditioning
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

3 Description

The TDP20MB421 is a 4-channel linear redriver with an integrated 2:1 MUX. The low-power, high-performance linear redriver is designed to support DisplayPort 2.1 up to 20Gbps.

The TDP20MB421 receivers deploy continuous time linear equalizers (CTLE) to provide a programmable high-frequency boost. The equalizer opens an input eye that is completely closed due to inter-symbol interference (ISI) induced by an interconnect medium, such as PCB traces. A CTLE receiver is followed by a linear output driver. The linear data paths of TDP20MB421 preserve the characteristics of the transmit preset. High bandwidth, low channel-to-channel crosstalk, low additive jitter, and excellent return loss make the device almost a passive element in the link. The DisplayPort link training is effective through the device as the device becomes part of the passive channel between the source Tx and sink Rx. The device transparency in the link-training protocol results in the best electrical link and lowest possible latency. The data path of the device uses an internally regulated power rail that provides high immunity to supply noise on the board.

The TDP20MB421 implements high-speed testing during production for reliable, high-volume manufacturing. The device also has low AC and DC gain variation, providing consistent equalization in high-volume platform deployment.

Package Information
PART NUMBER PACKAGE(1) PACKAGE SIZE(2)
TDP20MB421 RUA (WQFN, 42) 9mm × 3.5mm
(1) For more information, see Section 10.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.
TDP20MB421 Application Use Case Application Use Case