JAJSOD9A
january 2023 – july 2023
THS2630
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.4
Device Functional Modes
7.4.1
Power-Down Mode
8
Application and Implementation
8.1
Application Information
8.1.1
Output Common-Mode Voltage
8.1.1.1
Resistor Matching
8.1.2
Driving a Capacitive Load
8.1.3
Data Converters
8.1.4
Single-Supply Applications
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Active Antialias Filtering
8.2.3
Application Curve
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.1.1
PowerPAD™ Integrated Circuit Package Design Considerations
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Documentation Support
9.1.1
Related Documentation
9.2
ドキュメントの更新通知を受け取る方法
9.3
サポート・リソース
9.4
Trademarks
9.5
静電気放電に関する注意事項
9.6
用語集
10
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
D|8
MSOI002K
DGN|8
MPDS046G
DGK|8
MPDS028E
サーマルパッド・メカニカル・データ
DGN|8
PPTD388A
発注情報
jajsod9a_oa
jajsod9a_pm
8.4
Layout