JAJSMD3L
April 2000 – August 2023
THS4130
,
THS4131
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.4
Device Functional Modes
8.4.1
Power-Down Mode
9
Application and Implementation
9.1
Application Information
9.1.1
Output Common-Mode Voltage
9.1.1.1
Resistor Matching
9.1.2
Driving a Capacitive Load
9.1.3
Data Converters
9.1.4
Single-Supply Applications
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curve
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.1.1
PowerPAD™ Integrated Circuit Package Design Considerations
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Documentation Support
10.1.1
Related Documentation
10.2
ドキュメントの更新通知を受け取る方法
10.3
サポート・リソース
10.4
Trademarks
10.5
静電気放電に関する注意事項
10.6
用語集
11
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
D|8
MSOI002K
DGN|8
MPDS046G
DGK|8
MPDS028E
サーマルパッド・メカニカル・データ
DGN|8
PPTD041I
発注情報
jajsmd3l_oa
jajsmd3l_pm
9.1
Application Information