JAJSL64D April 2016 – June 2021 THS4551
PRODUCTION DATA
The THS4551 is well suited to
low-power, dc-coupled requirements driving low-power pipeline ADCs (such as the
ADC3241 25-MSPS, 14-bit, dual device). Figure 10-17 shows an example design taking a bipolar input to a
–1-dBFS swing at the ADC input of 1.8 VPP. In this case, a 50-Ω source
and input matching is assumed with a gain of 5 V/V to the output pins with a
2nd-order interstage filter adding a –1-dB insertion loss. Full-scale voltage at the
input of RT and RG1 is then ±0.2 V. The 0.95-V output
common-mode voltage is provided by the ADC. The output filter provides a noise-power
bandwidth limit with a low overshoot step response with no common-mode level shift
from the 0.95-V voltage provided by the ADC.