JAJSHN2B July   2019  – October 2021 THVD2410 , THVD2450

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  ESD Ratings [IEC]
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Thermal Information
    6. 6.6  Power Dissipation
    7. 6.7  Electrical Characteristics
    8. 6.8  Switching Characteristics: THVD2410
    9. 6.9  Switching Characteristics: THVD2450
    10. 6.10 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 ±70-V Fault Protection
      2. 8.3.2 Integrated IEC ESD and EFT Protection
      3. 8.3.3 Driver Overvoltage and Overcurrent Protection
      4. 8.3.4 Enhanced Receiver Noise Immunity
      5. 8.3.5 Receiver Fail-Safe Operation
      6. 8.3.6 Low-Power Shutdown Mode
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Data Rate and Bus Length
        2. 9.2.1.2 Stub Length
        3. 9.2.1.3 Bus Loading
        4. 9.2.1.4 Transient Protection
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 サポート・リソース
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.9 Switching Characteristics: THVD2450

50-Mbps device (THVD2450) over recommended operating conditions. All typical values are at 25°C and supply voltage of VCC = 5 V.
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
Driver
tr, tfDifferential output rise/fall timeRL = 54 Ω, CL = 50 pFSee Figure 7-357ns
tPHL, tPLHPropagation delay51016ns
tSK(P)Pulse skew, |tPHL – tPLH|3.5ns
tPHZ, tPLZDisable timeSee Figure 7-4 and Figure 7-51130ns
tPZH, tPZLEnable timeRE = 0 V825ns
RE = VCC1.54μs
tSHDNTime to shutdownRE = VCC50500ns
Receiver
tr, tfOutput rise/fall timeCL = 15 pFSee Figure 7-626ns
tPHL, tPLHPropagation delay4055ns
tSK(P)Pulse skew, |tPHL – tPLH|4ns
tPHZ, tPLZDisable time715ns
tPZH(1),
tPZL(1),
tPZH(2),
tPZL(2)		Enable timeDE = VCCSee Figure 7-75070ns
DE = 0 VSee Figure 7-824μs
tD(OFS)Delay to enter fail-safe operationCL = 15 pFSee Figure 7-971018μs
tD(FSO)Delay to exit fail-safe operation253550ns
tSHDNTime to shutdownDE = 0 VSee Figure 7-850500ns