JAJSOM1A April   2024  – April 2024 THVD4411

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  ESD Ratings [IEC]
    4. 5.4  Recommended Operating Conditions
    5. 5.5  Thermal Information
    6. 5.6  Power Dissipation
    7. 5.7  Electrical Characteristics
    8. 5.8  Switching Characteristics_RS-485_500kbps
    9. 5.9  Switching Characteristics_RS-485_20Mbps
    10. 5.10 Switching Characteristics, Driver_RS232
    11. 5.11 Switching Characteristics, Receiver_RS232
    12. 5.12 Switching Characteristics_MODE switching
    13. 5.13 Switching Characteristics_RS-485_Termination resistor
    14. 5.14 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Integrated IEC ESD and EFT Protection
      2. 7.3.2 Protection Features
      3. 7.3.3 Receiver Fail-Safe Operation
      4. 7.3.4 Low-Power Shutdown Mode
      5. 7.3.5 On-chip Switchable Termination resistor
      6. 7.3.6 Operational Data Rate
      7. 7.3.7 Integrated Charge Pump for RS-232
    4. 7.4 Device Functional Modes
      1. 7.4.1 RS-485 Functionality
      2. 7.4.2 RS-232 Functionality
      3. 7.4.3 Mode Control
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Data Rate and Bus Length
        2. 8.2.1.2 Stub Length
        3. 8.2.1.3 Bus Loading
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.3.5 On-chip Switchable Termination resistor

THVD4411 has 2 termination resistors of nominal 120Ω, one across R1/R2 and another across R3/R4 in RS-485 mode. Both termination resistors are enabled or disabled using pins as described in Table 7-2. Both the termination resistors can be enabled or disabled independent of the state of driver or receiver. Termination is OFF in RS-232 1T1R, unpowered and thermal shutdown modes.

Table 7-2 On-chip termination function table
Signal state Device mode Function Comments
TERM_TX = VIO Full duplex mode 120Ω enabled between R1 and R2 Termination between R1/R2 is disabled by default
TERM_TX = GND or floating Full duplex mode 120Ω disabled between R1 and R2
TERM_RX = VIO Full duplex mode 120Ω enabled between R3 and R4 Termination between R3/R4 is disabled by default
TERM_RX = GND or floating Full duplex mode 120Ω disabled between R3 and R4
TERM_RX = X, TERM_TX = VIO Half duplex mode 120Ω enabled between R1 and R2 In half duplex mode, TERM_RX is don't care and TERM_TX has higher priority
TERM_RX = X, TERM_TX = GND Half duplex mode 120Ω disabled between R1 and R2

On-chip 120Ω termination resistor is designed to have a minimum variation with temperature and across common mode voltage on bus pins. Also, the termination block offers a resistive load to the bus, and does not alter the magnitude or phase of the bus signals from DC to 20Mbps signaling.