JAJSDR6C August 2017 – February 2022 TIC12400-Q1
PRODUCTION DATA
After device initialization, the TIC12400-Q1 is ready to be configured. The microcontroller can use SPI commands to program desired settings to the configuration registers. Once the device configuration is completed, the microcontroller is required to set the bit TRIGGER in the CONFIG register to logic 1 in order to activate wetting current and start external switch monitoring.
After switch monitoring initiates, the configuration registers turn into read-only registers (with the exception of the TRIGGER, CRC_T, and RESET bits in the CONFIG register and all bits in the CCP_CFG1 register). If at any time the device setting needs to be re-configured, the microcontroller is required to first set the bit TRIGGER in the CONFIG register to logic 0 to stop wetting current and switch monitoring. The microcontroller can then program configuration registers to the desired settings. Once the re-configuration is completed the microcontroller can set the TRIGGER bit back to logic 1 to re-start switch monitoring.
Note the cyclic redundancy check (CRC) feature stays accessible when TRIGGER bit is in logic 1, allowing the microcontroller to verify device settings at all time. Refer to section Cyclic Redundancy Check (CRC) for more details of the CRC feature.