JAJSVB5 September   2024 TIOL221

ADVANCE INFORMATION  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 ESD Ratings - IEC Specifications
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Thermal Information
    6. 5.6 Electrical Characteristics
    7. 5.7 Switching Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1  Wake-Up Detection
      2. 7.3.2  Current Limit Configuration
        1. 7.3.2.1 Current Limit Configuration in Pin-Mode
        2. 7.3.2.2 Current Limit Configuration in SPI mode
      3. 7.3.3  CQ Current Fault Detection, Indication and Auto Recovery
      4. 7.3.4  DO Current Fault Detection, Indication and Auto Recovery
      5. 7.3.5  CQ and DI Receivers
      6. 7.3.6  Fault Reporting
        1. 7.3.6.1 Thermal Warning, Thermal Shutdown
      7. 7.3.7  The Integrated Voltage Regulator (LDO)
      8. 7.3.8  Reverse Polarity Protection
      9. 7.3.9  Integrated Surge Protection and Transient Waveform Tolerance
      10. 7.3.10 Undervoltage Lock-Out (UVLO)
      11. 7.3.11 Interrupt Function
    4. 7.4 Device Functional Modes
      1. 7.4.1 CQ and DO Tracking mode
    5. 7.5 SPI Programming
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Driving Capacitive Loads
        2. 8.2.2.2 Driving Inductive Loads
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 TIOL221 Registers
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 サポート・リソース
    3. 10.3 Trademarks
    4. 10.4 静電気放電に関する注意事項
    5. 10.5 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Tape and Reel Information
    2. 12.2 Mechanical Data

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • RGE|24
サーマルパッド・メカニカル・データ
発注情報

7.3.2.1 Current Limit Configuration in Pin-Mode

In the pin-mode, the current limit of CQ and DO can be configured with an external resistor on the ILIM_ADJ1 and ILIM_ADJ2 pins respectively. The highest current limit setting with an external resistor of 10kΩ provides a minimum of 300mA over the operating temperature and voltage range. Refer to Table 7-2 for the pin-mode configuration of the CQ and DO drivers.

Output disable due to current fault and current fault auto recovery features can be disabled by floating ILIM_ADJ1/2 pins. However, the current fault indication is still active in this configuration. This feature is useful when driving large capacitance.

When ILIM_ADJ1/2 pins are shorted to ground, the CQ and the DO drivers can configured to be in the IO-link controller mode. In this mode, the drivers can source or sink minimum of 500mA to generate a wake-up request. In addition, drivers enable a small current sink of 5mA (minimum) at the driver output pins. The current fault indication, output disable, and auto recovery features are disabled in this mode.

Table 7-2 Current Limit Configuration in Pin-mode
ILIM_ADJ1/2 Pin ConditionCQ/DO Current Limit

(Min.)

NFLT1/2 Indication Due to Current

Fault

Current Fault Blanking Time (tSC)Output Disable and Auto Recovery
RSET resistor to L-

(10kΩ to 110kΩ)

Variable

(35mA to 300mA)

Yes200µs (typ)Yes
Connected to L-

(RSET 0 to 5kΩ)

500mANoN/ANo
OPEN260mAYesNone (immediate fault indication)No