JAJSLT3N november   1978  – august 2023 TL061 , TL061A , TL061B , TL062 , TL062A , TL062B , TL064 , TL064A , TL064B

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information (TL061)
    5. 6.5  Thermal Information (TL062)
    6. 6.6  Thermal Information (TL064)
    7. 6.7  Electrical Characteristics for TL06xC and TL06xxC
    8. 6.8  Electrical Characteristics for TL06xxC and TL06xI
    9. 6.9  Electrical Characteristics for TL06xM
    10. 6.10 Operating Characteristics
    11.     Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Common-Mode Rejection Ratio
      2. 8.3.2 Slew Rate
    4. 8.4 Device Functional Modes
  10. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Inverting Amplifier Application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
    3. 9.3 System Examples
      1. 9.3.1 General Applications
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Examples
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 サポート・リソース
    3. 10.3 Trademarks
    4. 10.4 静電気放電に関する注意事項
    5. 10.5 用語集
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • D|8
  • P|8
  • PS|8
サーマルパッド・メカニカル・データ
発注情報

6.9 Electrical Characteristics for TL06xM

VCC± = ±15 V, RL = 10 kΩ to (VCC+ + VCC–) / 2 (unless otherwise noted)
PARAMETER TEST CONDITIONS(2) TL061M, TL062M TL064M UNIT
MIN TYP MAX MIN TYP MAX
VIO Input offset voltage VO = 0, RS = 50 Ω TA = 25°C 3 6 3 9 mV
TA = –55°C to 125°C 9 15
αVIO Temperature coefficient
of input offset voltage		 VO = 0, RS = 50 Ω,
TA = –55°C to 125°C		 10 10 μV/°C
IIO(8) Input offset current VO = 0 TA = 25°C 5 100 5 100 pA
TA = –55°C 20(1) 20(1) nA
TA = 125°C 20 20
IIB(8) Input bias current(3) VO = 0 TA = 25°C 30 200 30 200 pA
TA = –55°C 50(1) 50(1) nA
TA = 125°C 50 50
VICR Common-mode input
voltage range		 TA = 25°C ±11 –12
to
15		 ±11 –12
to
15		 V
VOM Maximum peak output
voltage swing		 RL = 10 kΩ, TA = 25°C ±10 ±13.5 ±10 ±13.5 V
RL ≥ 10 kΩ, TA = –55°C to 125°C ±10 ±10
AVD Large-signal differential
voltage amplification		 VO = ±10 V,
RL ≥ 2 kΩ		 TA = 25°C 4 6 4 6 V/mV
TA = –55°C to 125°C 4 4
B1 Unity-gain bandwidth RL = 10 kΩ, TA = 25°C 1 1 MHz
ri Input resistance TA = 25°C 1012 1012 Ω
CMRR Common-mode
rejection ratio		 VIC = VICRmin,
VO = 0, RS = 50 Ω, TA = 25°C		 80 86 80 86 dB
kSVR Supply-voltage
rejection ratio
(ΔVCC±/ΔVIO)		 VCC = ±9 V to ±15 V,
VO = 0, RS = 50 Ω, TA = 25°C		 80 95 80 95 dB
PD Total power dissipation
(each amplifier)		 VO = 0, No load, TA = 25°C 6 7.5 6 7.5 mW
ICC Supply current
(each amplifier)		 VO = 0, No load, TA = 25°C 200 250 200 250 µA
VO1/VO2 Crosstalk attenuation AVD = 100, TA = 25°C 120 120 dB
(1) This parameter is not production tested.
(2) All characteristics are measured under open-loop conditions, with zero common-mode voltage, unless otherwise specified.
(3) Input bias currents of an FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive, as shown in Figure 6-12. Pulse techniques are used to maintain the junction temperature as close to the ambient temperature as possible.
(8) Specified by design and characterization; not production tested.