SLVS220G July   1999  – August 2016 TL7700

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Sense-Voltage Setting
      2. 8.3.2 Sense-Voltage Hysteresis Setting
      3. 8.3.3 Output Pulse-Duration Setting
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Community Resource
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VCC Supply voltage(2) 41 V
Vs Sense input voltage –0.3 41 V
VOH Output voltage (off state) 41 V
IOL Output current (on state) 5 mA
TJ Operating virtual-junction temperature 150 °C
Tstg Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to the network ground terminal.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) 500 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) 1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

MIN MAX UNIT
VCC Supply voltage 1.8 40 V
IOL Low-level output current 3 mA
TA Operating free-air temperature –40 85 °C

6.4 Thermal Information

THERMAL METRIC(1) TL7700 UNIT
DGK
(VSSOP)		 P
(PDIP)		 PS
(SO)		 PW
(TSSOP)
8 PINS 8 PINS 8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 173.8 57.6 112.5 172.9 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 63.1 47.4 64.2 56.6 °C/W
RθJB Junction-to-board thermal resistance 93.9 34.7 61.6 101.2 °C/W
ψJT Junction-to-top characterization parameter 8.5 25 25.1 5.2 °C/W
ψJB Junction-to-board characterization parameter 92.5 34.6 60.7 99.6 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Electrical Characteristics

VCC = 3 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT
Vs SENSE input voltage 25°C 495 500 505 mV
–40°C to 85°C 490 510
Is SENSE input current Vs = 0.4 V 25°C 2 2.5 3 µA
–40°C to 85°C 1.5 3.5
ICC Supply current VCC = 40 V, Vs = 0.6 V, No load 25°C 0.6 1 mA
VOL Low-level output voltage IOL = 1.5 mA 25°C 0.4 V
IOL = 3 mA 25°C 0.8
IOH High-level output current VOH = 40 V, Vs = 0.6 V –40°C to 85°C 1 µA
ICT Timing-capacitor charge current Vs = 0.6 V 25°C 11 15 19 µA

6.6 Switching Characteristics

VCC = 3 V, TA = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tpi SENSE pulse duration CT = 0.01 µF (See Figure 17) 2 µs
tpo Output pulse duration CT = 0.01 µF (See Figure 17) 0.5 1 1.5 ms
tr Output rise time CT = 0.01 µF, RL = 2.2 kΩ, CL = 100 pF (See Figure 17) 15 µs
tf Output fall time CT = 0.01 µF, RL = 2.2 kΩ, CL = 100 pF (See Figure 17) 0.5 µs
tpd Propagation delay time, SENSE to output CT = 0.01 µF (See Figure 17) 10 µs

6.7 Typical Characteristics

Data at high and low temperatures are applicable only within the recommended operating conditions.
TL7700 g_icc_vcc.gif
Figure 1. Supply Current vs Supply Voltage
TL7700 g_vol_iol.gif
Figure 3. VOL vs IOL
TL7700 g_is_vs.gif
Figure 5. Sense Input Current vs Sense Input Voltage
TL7700 vcc_out_wave_1.gif
Figure 7. VCC vs Output Waveform 1 - See Figure 8
TL7700 vcc_out_wave_2.gif
Figure 9. VCC vs Output Waveform 2 - See Figure 10
TL7700 vcc_out_wave_3.gif
Figure 11. VCC vs Output Waveform 3 - See Figure 12
TL7700 g_itcap_vcc.gif
Figure 2. Timing Capacitor Charge Current vs Supply Voltage
TL7700 g_vs_ta.gif
Figure 4. Sense Input Voltage vs Temperature
TL7700 g_tpo_ct.gif
Figure 6. Output Pulse Duration vs Timing Capacitor
TL7700 vcc_out_test_1.gif
Figure 8. VCC vs Output Test Circuit 1
TL7700 vcc_out_test_2.gif
Figure 10. VCC vs Output Test Circuit 2
TL7700 vcc_out_test_3.gif
Figure 12. VCC vs Output Test Circuit 3