JAJSN47G February   2003  – August 2022 TLC2272-Q1 , TLC2272A-Q1 , TLC2274-Q1 , TLC2274A-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: VDD = 5 V (TLC2272-Q1 and TLC2272A-Q1)
    6. 6.6 Electrical Characteristics: VDD± = ±5 V (TLC2272-Q1 and TLC2272A-Q1)
    7. 6.7 Electrical Characteristics: VDD = 5 V (TLC2274-Q1 and TLC2274A-Q1)
    8. 6.8 Electrical Characteristics: VDD± = ±5 V (TLC2274-Q1 and TLC2274A-Q1)
    9. 6.9 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Macromodel Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Differential Amplifier Equations
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 PSpice® for TI
        2. 9.1.1.2 TINA-TI™ Simulation Software (Free Download)
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.6 Electrical Characteristics: VDD± = ±5 V (TLC2272-Q1 and TLC2272A-Q1)

at specified free-air temperature, VDD± = ±5 V; TA = 25°C, unless otherwise noted.
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
VIOInput offset voltageVIC = 0 V, VO = 0 V,
RS = 50 Ω		TLC2272-Q1TA = 25°C3002500µV
TLC2272A-Q1300950
TLC2272-Q1Full Range(1)3000
TLC2272A-Q11500
αVIOTemperature coefficient of
input offset voltage		VIC = 0 V, VO = 0 V, RS = 50 Ω2μV/°C
Input offset voltage long-term drift(2)VIC = 0 V, VO = 0 V, RS = 50 Ω0.002μV/mo
IIOInput offset currentVIC = 0 V, VO = 0 V, RS = 50 ΩTA = 25°C0.560pA
Full Range(1)800
IIBInput bias currentVIC = 0 V, VO = 0 V, RS = 50 ΩTA = 25°C160pA
Full Range(1)800
VICRCommon-mode input voltageRS = 50 Ω; |VIO | ≤ 5 mVTA = 25°C–5.304V
Full Range(1)–503.5
VOM+Maximum positive peak
output voltage		IO = −20 μA4.99V
IO = −200 μATA = 25°C4.854.93
Full Range(1)4.85
IO = −1 mATA = 25°C4.254.65
Full Range(1)4.25
VOM-Maximum negative
peak output voltage		VIC = 0 VIO = 50 μA–4.99V
IO = 500 μATA = 25°C–4.85–4.91
Full Range(1)–4.85
IO = 5 mATA = 25°C–3.5–4.1
Full Range(1)–3.5
AVDLarge-signal differential
voltage amplification		VO = ±4 VRL = 10 kΩTA = 25°C2050V/mV
Full Range(1)20
RL = 1 MΩ300
ridDifferential input resistance1012Ω
riCommon-mode input resistance1012Ω
ciCommon-mode input capacitancef = 10 kHz, P package8pF
zoClosed-loop output impedancef = 1 MHz, AV = 10130Ω
CMRRCommon-mode rejection ratioVIC = –5 V to 2.7 V, VO = 0 V, RS = 50 ΩTA = 25°C7580dB
Full Range(1)75
kSVRSupply-voltage rejection ratio
(ΔVDD / ΔVIO)		VDD+ = 2.2 V to ±8 V, VIC = 0 V, no loadTA = 25°C8095dB
Full Range(1)80
IDDSupply currentVO = 0 V, no loadTA = 25°C2.43mA
Full Range(1)3
SRSlew rate at unity gainVO = ±2.3 V, RL = 10 kΩ, CL = 100 pFTA = 25°C2.33.6V/µs
Full Range(1)1.7
VnEquivalent input noise voltagef = 10 Hz50nV/√Hz
f = 1 kHz9
VNPPPeak-to-peak equivalent
input noise voltage		f = 0.1 Hz to 1 Hz1µV
f = 0.1 Hz to 10 Hz1.4
InEquivalent input noise current0.6fA/√Hz
THD+NTotal harmonic distortion + noiseVO = ±2.3, f = 20 kHz, RL = 10 kΩAV = 10.0011%
AV = 100.004%
AV = 1000.03%
Gain-bandwidth productf = 10 kHz, RL = 10 kΩ, CL = 100 pF2.25MHz
BOMMaximum output-swing bandwidthVO(PP) = 4.6 V, AV = 1, RL = 10 kΩ, CL = 100 pF0.54MHz
tsSettling timeAV = –1, RL = 10 kΩ,
Step = –2.3 V to 2.3 V, CL = 100 pF		To 0.1%1.5µs
To 0.01%3.2
φmPhase margin at unity gainRL = 10 kΩ, CL = 100 pF52°
Gain marginRL = 10 kΩ, CL = 100 pF10dB
(1) TA = –40°C to 125°C.
(2) Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.