JAJSDD2 June   2017 TLC2272AM-MIL

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 TLC2272AM-MIL Electrical Characteristics VDD = 5 V
    6. 6.6 TLC2272AM-MIL Electrical Characteristics VDD± = ±5 V
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Macromodel Information
    2. 8.2 Typical Application
      1. 8.2.1 High-Side Current Monitor
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Differential Amplifier Equations
        3. 8.2.1.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントの更新通知を受け取る方法
    2. 11.2 コミュニティ・リソース
    3. 11.3 商標
    4. 11.4 静電気放電に関する注意事項
    5. 11.5 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Specifications

6.1 Absolute Maximum Ratings

over operating ambient temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Supply voltage, VDD+(2) 8 V
VDD–(2) –8 V
Differential input voltage, VID(3) ±16 V
Input voltage, VI (any input)(2) VDD− − 0.3 VDD+ V
Input current, II (any input) ±5 mA
Output current, IO ±50 mA
Total current into VDD+ ±50 mA
Total current out of VDD– ±50 mA
Duration of short-circuit current at (or below) 25°C(4) Unlimited
Operating ambient temperature range, TA –55 125
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential voltages, are with respect to the midpoint between VDD+ and VDD–.
(3) Differential voltages are at IN+ with respect to IN–. Excessive current will flow if input is brought below VDD– – 0.3 V.
(4) The output may be shorted to either supply. Temperature or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1) Devices in D packages ±2000 V
Charged-device model (CDM), per AEC Q100-011 Devices in D packages ±1000
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 Recommended Operating Conditions

MIN MAX UNIT
VDD± Supply voltage ±2.2 ±8 V
VI Input voltage VDD− VDD+ − 1.5 V
VIC Common-mode input voltage VDD− VDD+ − 1.5 V
TA Operating ambient temperature –55 125 °C

6.4 Thermal Information

THERMAL METRIC(1) TLC2272AM-MIL UNIT
D (SOIC) JG (CDIP) FK (LCCC) U (CFP)
8-PIN 20-PIN 10-PIN
RθJA Junction-to-ambient thermal resistance (2)(3) 115.6 — — °C/W
RθJC(top) Junction-to-case (top) thermal resistance (2)(3) 61.8 18 121.3 °C/W
RθJB Junction-to-board thermal resistance 55.9 — — °C/W
ψJT Junction-to-top characterization parameter 14.3 — — °C/W
ψJB Junction-to-board characterization parameter 55.4 — — °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance — — 8.68 °C/W
(1) For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics.
(2) Maximum power dissipation is a function of TJ(max), RθJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) − TA) / RθJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
(3) The package thermal impedance is calculated in accordance with JESD 51-7 (plastic) or MIL-STD-883 Method 1012 (ceramic).

6.5 TLC2272AM-MIL Electrical Characteristics VDD = 5 V

at specified ambient temperature, VDD = 5 V; TA = 25°C, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIO Input offset voltage VIC = 0 V, VDD± = ±2.5 V,
VO = 0 V, RS = 50 Ω		 TA = 25°C 300 950 µV
TA = –55°C to 125°C 1500
αVIO Temperature coefficient of
input offset voltage		 VIC = 0 V, VDD± = ±2.5 V, VO = 0 V, RS = 50 Ω 2 μV/°C
Input offset voltage long-term drift(1) VIC = 0 V, VDD± = ±2.5 V, VO = 0 V, RS = 50 Ω 0.002 μV/mo
IIO Input offset current VIC = 0 V, VDD± = ±2.5 V,
VO = 0 V, RS = 50 Ω		 TA = 25°C 0.5 60 pA
TA = –55°C to 125°C 800
IIB Input bias current VIC = 0 V, VDD± = ±2.5 V,
VO = 0 V, RS = 50 Ω		 TA = 25°C 1 60 pA
TA = –55°C to 125°C 800
VICR Common-mode input voltage RS = 50 Ω; |VIO | ≤ 5 mV TA = 25°C –0.3 2.5 4 V
TA = –55°C to 125°C 0 2.5 3.5
VOH High-level output voltage IOH = –20 μA 4.99 V
IOH = –200 μA TA = 25°C 4.85 4.93
TA = –55°C to 125°C 4.85
IOH = –1 mA TA = 25°C 4.25 4.65
TA = –55°C to 125°C 4.25
VOL Low-level output voltage VIC = 2.5 V IOL = 50 μA 0.01 V
IOL = 500 μA TA = 25°C 0.09 0.15
TA = –55°C to 125°C 0.15
IOL = 5 mA TA = 25°C 0.9 1.5
TA = –55°C to 125°C 1.5
AVD Large-signal differential
voltage amplification		 VIC = 2.5 V, VO = 1 V to 4 V,
RL = 10 kΩ(2)		 TA = 25°C 10 35 V/mV
TA = –55°C to 125°C 10
VIC = 2.5 V, VO = 1 V to 4 V; RL = 1 MΩ(2) 175
rid Differential input resistance 1012 Ω
ri Common-mode input resistance 1012 Ω
ci Common-mode input capacitance f = 10 kHz, P package 8 pF
zo Closed-loop output impedance f = 1 MHz, AV = 10 140 Ω
CMRR Common-mode rejection ratio VIC = 0 V to 2.7 V,
VO = 2.5 V, RS = 50 Ω		 TA = 25°C 70 75 dB
TA = –55°C to 125°C 70
kSVR Supply-voltage rejection ratio
(ΔVDD / ΔVIO)		 VDD = 4.4 V to 16 V,
VIC = VDD / 2, no load		 TA = 25°C 80 95 dB
TA = –55°C to 125°C 80
IDD Supply currrent VO = 2.5 V, no load TA = 25°C 2.2 3 mA
TA = –55°C to 125°C 3
SR Slew rate at unity gain VO = 0.5 V to 2.5 V,
RL = 10 kΩ(2), CL = 100 pF(2)		 TA = 25°C 2.3 3.6 V/µs
TA = –55°C to 125°C 1.7
Vn Equivalent input noise voltage f = 10 Hz 50 nV/√Hz
f = 1 kHz 9
VNPP Peak-to-peak equivalent
input noise voltage		 f = 0.1 Hz to 1 Hz 1 µV
f = 0.1 Hz to 10 Hz 1.4
In Equivalent input noise current 0.6 fA/√Hz
THD+N Total harmonic distortion + noise VO = 0.5 V to 2.5 V,
f = 20 kHz, RL = 10 kΩ(2)		 AV = 1 0.0013%
AV = 10 0.004%
AV = 100 0.03%
Gain-bandwidth product f = 10 kHz, RL = 10 kΩ(2), CL = 100 pF(2) 2.18 MHz
BOM Maximum output-swing bandwidth VO(PP) = 2 V, AV = 1, RL = 10 kΩ(2), CL = 100 pF(2) 1 MHz
ts Settling time AV = –1, RL = 10 kΩ(2),
Step = 0.5 V to 2.5 V, CL = 100 pF(2)		 To 0.1% 1.5 µs
To 0.01% 2.6
φm Phase margin at unity gain RL = 10 kΩ(2), CL = 100 pF(2) 50 °
Gain margin RL = 10 kΩ(2), CL = 100 pF(2) 10 dB
(1) Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
(2) Referenced to 0 V.

6.6 TLC2272AM-MIL Electrical Characteristics VDD± = ±5 V

at specified ambient temperature, VDD± = ±5 V; TA = 25°C, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIO Input offset voltage VIC = 0 V, VO = 0 V,
RS = 50 Ω		 TA = 25°C 300 950 µV
TA = –55°C to 125°C 1500
αVIO Temperature coefficient of
input offset voltage		 VIC = 0 V, VO = 0 V, RS = 50 Ω 2 μV/°C
Input offset voltage long-term drift(1) VIC = 0 V, VO = 0 V, RS = 50 Ω 0.002 μV/mo
IIO Input offset current VIC = 0 V, VO = 0 V,
RS = 50 Ω		 TA = 25°C 0.5 60 pA
TA = –55°C to 125°C 800
IIB Input bias current VIC = 0 V, VO = 0 V,
RS = 50 Ω		 TA = 25°C 1 60 pA
TA = –55°C to 125°C 800
VICR Common-mode input voltage RS = 50 Ω; |VIO | ≤ 5 mV TA = 25°C –5.3 0 4 V
TA = –55°C to 125°C –5 0 3.5
VOM+ Maximum positive peak
output voltage		 IO = –20 μA 4.99 V
IO = –200 μA TA = 25°C 4.85 4.93
TA = –55°C to 125°C 4.85
IO = –1 mA TA = 25°C 4.25 4.65
TA = –55°C to 125°C 4.25
VOM– Maximum negative
peak output voltage		 VIC = 0 V, IO = 50 μA –4.99 V
IO = 500 μA TA = 25°C –4.85 –4.91
TA = –55°C to 125°C –4.85
IO = 5 mA TA = 25°C –3.5 –4.1
TA = –55°C to 125°C –3.5
AVD Large-signal differential
voltage amplification		 VO = ±4 V; RL = 10 kΩ TA = 25°C 20 50 V/mV
TA = –55°C to 125°C 20
VO = ±4 V; RL = 1 MΩ 300
rid Differential input resistance 1012 Ω
ri Common-mode input resistance 1012 Ω
ci Common-mode input capacitance f = 10 kHz, P package 8 pF
zo Closed-loop output impedance f = 1 MHz, AV = 10 130 Ω
CMRR Common-mode rejection ratio VIC = –5 V to 2.7 V,
VO = 0 V, RS = 50 Ω		 TA = 25°C 75 80 dB
TA = –55°C to 125°C 75
kSVR Supply-voltage rejection ratio
(ΔVDD / ΔVIO)		 VDD+ = 2.2 V to ±8 V,
VIC = 0 V, no load		 TA = 25°C 80 95 dB
TA = –55°C to 125°C 80
IDD Supply currrent VO = 0 V, no load TA = 25°C 2.4 3 mA
TA = –55°C to 125°C 3
SR Slew rate at unity gain VO = ±2.3 V,
RL = 10 kΩ, CL = 100 pF		 TA = 25°C 2.3 3.6 V/µs
TA = –55°C to 125°C 1.7
Vn Equivalent input noise voltage f = 10 Hz 50 nV/√Hz
f = 1 kHz 9
VNPP Peak-to-peak equivalent
input noise voltage		 f = 0.1 Hz to 1 Hz 1 µV
f = 0.1 Hz to 10 Hz 1.4
In Equivalent input noise current 0.6 fA/√Hz
THD+N Total harmonic distortion + noise VO = ±2.3,
f = 20 kHz, RL = 10 kΩ		 AV = 1 0.0011%
AV = 10 0.004%
AV = 100 0.03%
Gain-bandwidth product f = 10 kHz, RL = 10 kΩ, CL = 100 pF 2.25 MHz
BOM Maximum output-swing bandwidth VO(PP) = 4.6 V, AV = 1, RL = 10 kΩ, CL = 100 pF 0.54 MHz
ts Settling time AV = –1, RL = 10 kΩ,
Step = –2.3 V to 2.3 V, CL = 100 pF		 To 0.1% 1.5 µs
To 0.01% 3.2
φm Phase margin at unity gain RL = 10 kΩ, CL = 100 pF 52 °
Gain margin RL = 10 kΩ, CL = 100 pF 10 dB

6.7 Typical Characteristics

Table 1. Table of Graphs

FIGURE(1)
VIO Input offset voltage Distribution 1, 2
vs Common-mode voltage 3, 4
αVIO Input offset voltage temperature coefficient Distribution 5, 6 (2)
IIB / IIO Input bias and input offset current vs ambient temperature 7(2)
VI Input voltage vs Supply voltage 8
vs ambient temperature 9(2)
VOH High-level output voltage vs High-level output current 10(2)
VOL Low-level output voltage vs Low-level output current 11, 12(2)
VOM+ Maximum positive peak output voltage vs Output current 13(2)
VOM- Maximum negative peak output voltage vs Output current 14(2)
VO(PP) Maximum peak-to-peak output voltage vs Frequency 15
IOS Short-circuit output current vs Supply voltage 16
vs ambient temperature 17(2)
VO Output voltage vs Differential input voltage 18, 19
AVD Large-signal differential voltage amplification vs Load resistance 20
Large-signal differential voltage amplification and phase margin vs Frequency 21, 22
Large-signal differential voltage amplification vs ambient temperature 23(2), 24(2)
z0 Output impedance vs Frequency 25, 26
CMRR Common-mode rejection ratio vs Frequency 27
vs ambient temperature 28
kSVR Supply-voltage rejection ratio vs Frequency 29, 30
vs ambient temperature 31(2)
IDD Supply current vs Supply voltage 32(2), (2)
vs ambient temperature 33(2), (2)
SR Slew rate vs Load Capacitance 34
vs ambient temperature 35(2)
VO Inverting large-signal pulse response 36, 37
Voltage-follower large-signal pulse response 38, 39
Inverting small-signal pulse response 40, 41
Voltage-follower small-signal pulse response 42, 43
Vn Equivalent input noise voltage vs Frequency 44, 45
Noise voltage over a 10-second period 46
Integrated noise voltage vs Frequency 47
THD+N Total harmonic distortion + noise vs Frequency 48
Gain-bandwidth product vs Supply voltage 49
vs ambient temperature 50(2)
φm Phase margin vs Load capacitance 51
Gain margin vs Load capacitance 52
(1) For all graphs where VDD = 5 V, all loads are referenced to 2.5 V.
(2) Data at high and low temperatures are applicable only within the rated operating ambient temperature range of the device.
TLC2272AM-MIL slos190_typchar_1.gif Figure 1. Distribution of Input Offset Voltage
TLC2272AM-MIL slos190_typchar_5.gif Figure 3. Input Offset Voltage vs Common-Mode Voltage
TLC2272AM-MIL slos190_typchar_7.gif Figure 5. Distribution of Amplifiers vs
Input Offset Voltage Temperature Coefficient
TLC2272AM-MIL slos190_typchar_11.gif Figure 7. Input Bias and Input Offset Current vs
Ambient Temperature
TLC2272AM-MIL slos190_typchar_13.gif Figure 9. Input Voltage vs Ambient Temperature
TLC2272AM-MIL slos190_typchar_15.gif Figure 11. Low-Level Output Voltage vs
Low-Level Output Current
TLC2272AM-MIL slos190_typchar_17.gif Figure 13. Maximum Positive Peak Output Voltage vs
Output Current
TLC2272AM-MIL slos190_typchar_19.gif Figure 15. Maximum Peak-to-Peak Output Voltage vs
Frequency
TLC2272AM-MIL slos190_typchar_21.gif Figure 17. Short-Circuit Output Current vs
Ambient Temperature
TLC2272AM-MIL slos190_typchar_23.gif Figure 19. Output Voltage vs Differential Input Voltage
TLC2272AM-MIL slos190_typchar_25.gif Figure 21. Large-Signal Differential Voltage Amplification and Phase Margin vs Frequency
TLC2272AM-MIL slos190_typchar_27.gif Figure 23. Large-Signal Differential Voltage Amplification vs Ambient Temperature
TLC2272AM-MIL slos190_typchar_29.gif Figure 25. Output Impedance vs Frequency
TLC2272AM-MIL slos190_typchar_31.gif Figure 27. Common-Mode Rejection Ratio vs Frequency
TLC2272AM-MIL slos190_typchar_33.gif Figure 29. Supply-Voltage Rejection Ratio vs Frequency
TLC2272AM-MIL slos190_typchar_35.gif Figure 31. Supply-Voltage Rejection Ratio vs
Ambient Temperature
TLC2272AM-MIL slos190_typchar_38.gif Figure 33. Supply Current vs Ambient Temperature
TLC2272AM-MIL slos190_typchar_41.gif Figure 35. Slew Rate vs Ambient Temperature
TLC2272AM-MIL slos190_typchar_43.gif Figure 37. Inverting Large-Signal Pulse Response
TLC2272AM-MIL slos190_typchar_45.gif Figure 39. Voltage-Follower Large-Signal Pulse Response
TLC2272AM-MIL slos190_typchar_47.gif Figure 41. Inverting Small-Signal Pulse Response
TLC2272AM-MIL slos190_typchar_49.gif Figure 43. Voltage-Follower Small-Signal Pulse Response
TLC2272AM-MIL slos190_typchar_51.gif Figure 45. Equivalent Input Noise Voltage vs Frequency
TLC2272AM-MIL slos190_typchar_53.gif Figure 47. Integrated Noise Voltage vs Frequency
TLC2272AM-MIL slos190_typchar_55.gif Figure 49. Gain-Bandwidth Product vs Supply Voltage
TLC2272AM-MIL slos190_typchar_57.gif Figure 51. Phase Margin vs Load Capacitance
TLC2272AM-MIL slos190_typchar_2.gif Figure 2. Distribution of Input Offset Voltage
TLC2272AM-MIL slos190_typchar_6.gif Figure 4. Input Offset Voltage vs Common-Mode Voltage
TLC2272AM-MIL slos190_typchar_8.gif Figure 6. Distribution of Amplifiers vs
Input Offset Voltage Temperature Coefficient
TLC2272AM-MIL slos190_typchar_12.gif Figure 8. Input Voltage vs Supply Voltage
TLC2272AM-MIL slos190_typchar_14.gif Figure 10. High-Level Output Voltage vs
High-Level Output Current
TLC2272AM-MIL slos190_typchar_16.gif Figure 12. Low-Level Output Voltage vs
Low-Level Output Current
TLC2272AM-MIL slos190_typchar_18.gif Figure 14. Maximum Negative Peak Output Voltage vs
Output Current
TLC2272AM-MIL slos190_typchar_20.gif Figure 16. Short-Circuit Output Current vs Supply Voltage
TLC2272AM-MIL slos190_typchar_22.gif Figure 18. Output Voltage vs Differential Input Voltage
TLC2272AM-MIL slos190_typchar_24.gif Figure 20. Large-Signal Differential Voltage Amplification vs
Load Resistance
TLC2272AM-MIL slos190_typchar_26.gif Figure 22. Large-Signal Differential Voltage Amplification and Phase Margin vs Frequency
TLC2272AM-MIL slos190_typchar_28.gif Figure 24. Large-Signal Differential Voltage Amplification vs Ambient Temperature
TLC2272AM-MIL slos190_typchar_30.gif Figure 26. Output Impedance vs Frequency
TLC2272AM-MIL slos190_typchar_32.gif Figure 28. Common-Mode Rejection Ratio vs
Ambient Temperature
TLC2272AM-MIL slos190_typchar_34.gif Figure 30. Supply-Voltage Rejection Ratio vs Frequency
TLC2272AM-MIL slos190_typchar_36.gif Figure 32. Supply Current vs Supply Voltage
TLC2272AM-MIL slos190_typchar_40.gif Figure 34. Slew Rate vs Load Capacitance
TLC2272AM-MIL slos190_typchar_42.gif Figure 36. Inverting Large-Signal Pulse Response
TLC2272AM-MIL slos190_typchar_44.gif Figure 38. Voltage-Follower Large-Signal Pulse Response
TLC2272AM-MIL slos190_typchar_46.gif Figure 40. Inverting Small-Signal Pulse Response
TLC2272AM-MIL slos190_typchar_48.gif Figure 42. Voltage-Follower Small-Signal Pulse Response
TLC2272AM-MIL slos190_typchar_50.gif Figure 44. Equivalent Input Noise Voltage vs Frequency
TLC2272AM-MIL slos190_typchar_52.gif Figure 46. Noise Voltage Over a 10-Second Period
TLC2272AM-MIL slos190_typchar_54.gif Figure 48. Total Harmonic Distortion + Noise vs Frequency
TLC2272AM-MIL slos190_typchar_56.gif Figure 50. Gain-Bandwidth Product vs Ambient Temperature
TLC2272AM-MIL slos190_typchar_58.gif Figure 52. Gain Margin vs Load Capacitance