SLDS223A
March 2016 – March 2016
TLC59116-Q1
PRODUCTION DATA.
1
Features
2
Applications
3
Description
4
Revision History
5
Description (continued)
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements
7.7
Typical Characteristics
8
Parameter Measurement Information
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagram
9.3
Feature Description
9.3.1
Open-Circuit Detection
9.3.2
Overtemperature Detection and Shutdown
9.3.3
Power-On Reset (POR)
9.3.4
External Reset
9.3.5
Software Reset
9.3.6
Individual Brightness Control With Group Dimming/Blinking
9.4
Device Functional Modes
9.4.1
Active
9.4.2
Standby
9.5
Programming
9.5.1
Characteristics of the I2C Bus
9.5.1.1
Bit Transfer
9.5.1.2
Start and Stop Conditions
9.5.1.3
Acknowledge
9.5.2
System Configuration
9.5.3
Device Address
9.5.4
Regular I2C Bus Slave Address
9.5.5
LED All Call I2C Bus Address
9.5.6
LED Sub Call I2C Bus Address
9.5.7
Software Reset I2C Bus Address
9.5.8
Control Register
9.6
Register Maps
9.6.1
Mode Register 1 (MODE1)
9.6.2
Mode Register 2 (MODE2)
9.6.3
Brightness Control Registers 0 to 15 (PWM0 to PWM15)
9.6.4
Group Duty Cycle Control Register (GRPPWM)
9.6.5
Group Frequency Register (GRPFREQ)
9.6.6
LED Driver Output State Registers 0 to 3 (LEDOUT0 to LEDOUT3)
9.6.7
I2C Bus Subaddress Registers 1 to 3 (SUBADR1 to SUBADR3)
9.6.8
LED All Call I2C Bus Address Register (ALLCALLADR)
9.6.9
Output Gain Control Register (IREF)
9.6.10
Error Flags Registers (EFLAG1, EFLAG2)
10
Application and Implementation
10.1
Application Information
10.1.1
Constant Current Output
10.1.2
Adjusting Output Current
10.2
Typical Application
10.2.1
Design Requirements
10.2.2
Detailed Design Procedure
10.2.3
Application Curve
11
Power Supply Recommendations
12
Layout
12.1
Layout Guidelines
12.2
Layout Example
12.3
Thermal Considerations
13
Device and Documentation Support
13.1
Community Resources
13.2
Trademarks
13.3
Electrostatic Discharge Caution
13.4
Glossary
14
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
PW|28
MPDS364
サーマルパッド・メカニカル・データ
発注情報
slds223a_oa
slds223a_pm
8 Parameter Measurement Information
Figure 5. Reset Timing
Figure 6. Definition of Timing
NOTE: Rise and fall times refer to V
IL
and V
IH
.
Figure 7. I
2
C Bus Timing
NOTE:
R
L
= Load resistance for SDA and SCL; should be >1 kΩ at 3-mA or lower current
C
L
= Load capacitance; includes jig and probe capacitance
R
T
= Termination resistance; should be equal to the output impedance (Z
O
) of the pulse generator
Figure 8. Test Circuit for Switching Characteristics