SLDS165A December   2008  – December 2014 TLC5941-Q1

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Parameter Measurement Information
    1. 7.1 Pin Equivalent Input and Output Schematic Diagrams
    2. 7.2 Test Parameter Equations
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Serial Interface
      2. 8.3.2 Error Information Output
      3. 8.3.3 TEF: Thermal Error Flag
      4. 8.3.4 LOD: LED Open Detection
      5. 8.3.5 Delay Between Outputs
      6. 8.3.6 Output Enable
      7. 8.3.7 Status Information Output
      8. 8.3.8 Grayscale PWM Operation
        1. 8.3.8.1 Output On Time
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operating Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Setting Maximum Channel Current
        2. 9.2.2.2 Power Dissipation Calculation
        3. 9.2.2.3 Setting Dot Correction
        4. 9.2.2.4 Setting Grayscale
        5. 9.2.2.5 Serial Data Transfer Rate
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

PWP Package
28-Pin HSSOP With Thermal Pad
Top View
pinout_pwp28_lds165.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
BLANK 2 I Blank all outputs. When BLANK = H, all OUTn outputs are forced OFF. GS counter is also reset. When BLANK = L, OUTn are controlled by grayscale PWM control. This pin should be pull up to high before micro-controller or digital signal processor sending control signal to device. A pull-up resistor to VCC is needed.
GND 1 G Ground
GSCLK 25 I Reference clock for grayscale PWM control
IREF 27 I/O Reference current terminal
MODE 6 I Input mode-change pin. When MODE = GND, the device is in GS mode. When MODE = VCC, the device is in DC mode.
OUT0 7 O Constant-current output
OUT1 8 O Constant-current output
OUT2 9 O Constant-current output
OUT3 10 O Constant-current output
OUT4 11 O Constant-current output
OUT5 12 O Constant-current output
OUT6 13 O Constant-current output
OUT7 14 O Constant-current output
OUT8 15 O Constant-current output
OUT9 16 O Constant-current output
OUT10 17 O Constant-current output
OUT11 18 O Constant-current output
OUT12 19 O Constant-current output
OUT13 20 O Constant-current output
OUT14 21 O Constant-current output
OUT15 22 O Constant-current output
SCLK 4 I Serial data shift clock
SIN 5 I Serial data input
SOUT 24 O Serial data output
TEST 26 I Test. Must be connected to VCC.
VCC 28 I Power supply voltage. This pin should be powered up before micro-controller or digital signal processor sending control signal to device.
XERR 23 O Error output. Open-drain. Goes L when LOD or TEF is detected.
XLAT 3 I Level triggered latch signal. When XLAT = high, the TLC5941-Q1 writes data from the input shift register to either GS register (MODE = low) or DC register (MODE = high). When XLAT = low, the data in the GS or DC registers is held constant and does not change.