JAJSFT9A May   2009  – July 2018 TLC5952

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      代表的なアプリケーション回路 (複数のTLC5952のデイジー・チェーン接続)
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Pin Equivalent Input and Output Schematic Diagrams
    2. 7.2 Test Circuits
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Maximum Constant-Sink-Current Value
      2. 8.3.2 Global Brightness Control (BC) Function: Sink-Current Control
      3. 8.3.3 Constant-Current Output On-Off Control
    4. 8.4 Device Functional Modes
      1. 8.4.1 LOD, LSD, and TEF Operation
      2. 8.4.2 Register and Data Latch Configuration
        1. 8.4.2.1 Output On-Off Data Latch
        2. 8.4.2.2 Control-Data Latch
        3. 8.4.2.3 Status Information Data (SID)
        4. 8.4.2.4 LED-Open Detection (LOD), LED-Short Detection (LSD), And Thermal Error Flag (TEF)
        5. 8.4.2.5 Thermal Shutdown (TSD)
        6. 8.4.2.6 Noise Reduction
  9. 9 Power Supply Recommendations
  10. 10デバイスおよびドキュメントのサポート
    1. 10.1 ドキュメントの更新通知を受け取る方法
    2. 10.2 コミュニティ・リソース
    3. 10.3 商標
    4. 10.4 静電気放電に関する注意事項
    5. 10.5 Glossary
  11. 11メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.4.2.3 Status Information Data (SID)

The 25-bit word status information data (SID) contains the status of the LED open detection (LOD) or LED short detection (LSD), and thermal error flag (TEF). When the MSB of the common shift register is set to 0, the SID overwrites the common shift register data at the rising edge of LAT after the data in the common shift register are copied to the output on-off data latch. If the common shift register MSB is 1, the SID data are not copied to the common shift register.

After being copied into the common shift register, new SID data are not available until new data are written into the common shift register. If new data are not written, the LAT signal is ignored. To recheck SID data without changing the constant-current output on-off data, reprogram the common shift register with the same data that are currently programmed into the output on-off data latch. When LAT goes high, the output on-off data do not change, but new SID data are loaded into the common shift register. LOD, LSD, and TEF are shifted out of SOUT with each rising edge of SCLK.

TLC5952 ai_config_sid_asgn_bvs129.gifFigure 39. SID Load Assignment