JAJSCL5C November 2016 – January 2019 TLV172 , TLV2172 , TLV4172
PRODUCTION DATA.
PIN | I/O | DESCRIPTION | |||
---|---|---|---|---|---|
NAME | SC70 | SOT-23 | SOIC | ||
–IN | 3 | 4 | 2 | I | Negative (inverting) input |
+IN | 1 | 3 | 3 | I | Positive (noninverting) input |
NC | — | — | 1, 5, 8 | — | No internal connection (can be left floating) |
OUT | 4 | 1 | 6 | O | Output |
V– | 2 | 2 | 4 | — | Negative (lowest) power supply |
V+ | 5 | 5 | 7 | — | Positive (highest) power supply |
PIN | I/O | DESCRIPTION | ||
---|---|---|---|---|
NAME | SOIC
(D) |
VSSOP
(DGK) |
||
–IN A | 2 | 2 | I | Inverting input, channel A |
–IN B | 6 | 6 | I | Inverting input, channel B |
+IN A | 3 | 3 | I | Noninverting input, channel A |
+IN B | 5 | 5 | I | Noninverting input, channel B |
OUT A | 1 | 1 | O | Output, channel A |
OUT B | 7 | 7 | O | Output, channel B |
V– | 4 | 4 | — | Negative (lowest) power supply |
V+ | 8 | 8 | — | Positive (highest) power supply |
PIN | I/O | DESCRIPTION | ||
---|---|---|---|---|
NAME | SOIC
(D) |
TSSOP
(PW) |
||
–IN A | 2 | 2 | I | Inverting input, channel A |
–IN B | 6 | 6 | I | Inverting input, channel B |
–IN C | 9 | 9 | I | Inverting input, channel C |
–IN D | 13 | 13 | I | Inverting input, channel D |
+IN A | 3 | 3 | I | Noninverting input, channel A |
+IN B | 5 | 5 | I | Noninverting input, channel B |
+IN C | 10 | 10 | I | Noninverting input, channel C |
+IN D | 12 | 12 | I | Noninverting input, channel D |
OUT A | 1 | 1 | O | Output, channel A |
OUT B | 7 | 7 | O | Output, channel B |
OUT C | 8 | 8 | O | Output, channel C |
OUT D | 14 | 14 | O | Output, channel D |
V– | 11 | 11 | — | Negative (lowest) power supply |
V+ | 4 | 4 | — | Positive (highest) power supply |