JAJSGX9B August   2018  – January 2020 TLV1805-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      N チャネル MOSFET による逆電流保護
      2.      P チャネル MOSFET による逆電流および過電圧保護
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Rail to Rail Inputs
      2. 7.3.2 Power On Reset
      3. 7.3.3 High Power Push-Pull Output
      4. 7.3.4 Shutdown Function
      5. 7.3.5 Internal Hysteresis
    4. 7.4 Device Functional Modes
      1. 7.4.1 External Hysteresis
        1. 7.4.1.1 Inverting Comparator With Hysteresis
        2. 7.4.1.2 Noninverting Comparator With Hysteresis
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
      4. 8.2.4 Reverse Current Protection Using MOSFET and TLV1805-Q1
        1. 8.2.4.1 Minimum Reverse Current
        2. 8.2.4.2 N-Channel Reverse Current Protection Circuit
          1. 8.2.4.2.1 N-Channel Oscillator Circuit
      5. 8.2.5 P-Channel Reverse Current Protection Circuit
      6. 8.2.6 P-Channel Reverse Current Protection With Overvotlage Protection
      7. 8.2.7 ORing MOSFET Controller
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントのサポート
      1. 11.1.1 関連資料
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 サポート・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.2.2 Detailed Design Procedure

A small change to the comparator circuit can be made to add hysteresis. Hysteresis uses two different threshold voltages to avoid the multiple transitions introduced in the previous circuit. The input signal must exceed the upper threshold (VH) to transition low, or below the lower threshold (VL) to transition high.

Figure 66 illustrates hysteresis on a comparator. Resistor RH sets the hysteresis level.

When the output is at a logic high (5 V), RH is in parallel with RX. This configuration drives more current into Ry, and raises the threshold voltage (VH) to 2.7 V. The input signal must drive above VH = 2.7 V to cause the output to transition to logic low (0 V).

When the output is at logic low (0 V), Rh is in parallel with Ry. This configuration reduces the current into Ry, and reduces the threshold voltage to 2.3 V. The input signal must drive below VL = 2.3 V to cause the output to transition to logic high (5 V).

For more details on this design, refer to Precision Design TIPD144, Comparator with Hysteresis Reference Design.