JAJSGP1 December   2018 TLV1805

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      P チャネル MOSFET による過電圧保護
      2.      P チャネル MOSFET による逆電流および過電圧保護
  4. 4 改訂履歴
  5. 5 概要 (続き)
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Rail to Rail Inputs
      2. 8.3.2 Power On Reset
      3. 8.3.3 High Power Push-Pull Output
      4. 8.3.4 Shutdown Function
      5. 8.3.5 Internal Hysteresis
    4. 8.4 Device Functional Modes
      1. 8.4.1 External Hysteresis
        1. 8.4.1.1 Inverting Comparator With Hysteresis
        2. 8.4.1.2 Noninverting Comparator With Hysteresis
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
      4. 9.2.4 Reverse Current Protection Using MOSFET and TLV1805
        1. 9.2.4.1 Minimum Reverse Current
        2. 9.2.4.2 N-Channel Reverse Current Protection Circuit
          1. 9.2.4.2.1 N-Channel Oscillator Circuit
      5. 9.2.5 P-Channel Reverse Current Protection Circuit
      6. 9.2.6 P-Channel Reverse Current Protection With Overvotlage Protection
      7. 9.2.7 ORing MOSFET Controller
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントのサポート
      1. 12.1.1 関連資料
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.4.1.1 Inverting Comparator With Hysteresis

TLV1805 ai_inverting_bos561.gifFigure 64. TLV1805 in an Inverting Configuration With Hysteresis

The inverting comparator with hysteresis requires a three-resistor network that is referenced to the comparator supply voltage (VCC), as shown in Figure 64. When VIN at the inverting input is less than VA, the output voltage is high (for simplicity, assume VO switches as high as VCC). The three network resistors can be represented as R1 || R3 in series with R2. Equation 1 defines the high-to-low trip voltage (VA1).

Equation 1. TLV1805 q_va1_bos561.gif

When VIN is greater than VA, the output voltage is low, very close to ground. In this case, the three network resistors can be presented as R2 || R3 in series with R1. Use Equation 2 to define the low to high trip voltage (VA2).

Equation 2. TLV1805 q_va2_bos561.gif

Equation 3 defines the total hysteresis provided by the network.

Equation 3. TLV1805 q_delta_va_bos561.gif