JAJSCN6A November   2016  – May 2018 TLV170 , TLV2170 , TLV4170

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
    1.     36Vのオペアンプとして最小のパッケージ
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions: TLV170
    2.     Pin Functions: TLV2170
    3.     Pin Functions: TLV4170
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: TLV170
    5. 6.5 Thermal Information: TLV2170
    6. 6.6 Thermal Information: TLV4170
    7. 6.7 Electrical Characteristics
    8. 6.8 Typical Characteristics: Table of Graphs
    9. 6.9 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Operating Characteristics
      2. 7.3.2 Phase-Reversal Protection
      3. 7.3.3 Electrical Overstress
      4. 7.3.4 Capacitive Load and Stability
    4. 7.4 Device Functional Modes
      1. 7.4.1 Common-Mode Voltage Range
      2. 7.4.2 Overload Recovery
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 開発サポート
        1. 11.1.1.1 TINA-TI™ (無料のダウンロード・ソフトウェア)
        2. 11.1.1.2 DIPアダプタ評価モジュール
        3. 11.1.1.3 ユニバーサル・オペアンプ評価モジュール
        4. 11.1.1.4 TI Precision Designs
        5. 11.1.1.5 WEBENCH Filter Designer
    2. 11.2 ドキュメントのサポート
      1. 11.2.1 関連資料
    3. 11.3 関連リンク
    4. 11.4 ドキュメントの更新通知を受け取る方法
    5. 11.5 コミュニティ・リソース
    6. 11.6 商標
    7. 11.7 静電気放電に関する注意事項
    8. 11.8 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.7 Electrical Characteristics

at TA = 25°C, VCM = VOUT = VS / 2, and RL = 10 kΩ connected to VS / 2 (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VOS Input offset voltage TA = 25°C 0.5 ±2.5 mV
TA = –40°C to +125°C ±2.7
dVOS/dT Input offset voltage drift TA = –40°C to +125°C ±2 µV/°C
PSRR Power-supply rejection ratio VS = 4 V to 36 V, TA = –40°C to +125°C 90 105 dB
Channel separation, dc 5 µV/V
INPUT BIAS CURRENT
IB Input bias current TA = 25°C ±10 pA
TA = –40°C to +125°C ±1 nA
IOS Input offset current TA = 25°C ±10 pA
TA = –40°C to +125°C ±50
NOISE
Input voltage noise f = 0.1 Hz to 10 Hz 2 µVPP
en Input voltage noise density f = 100 Hz 27 nV/√Hz
f = 1 kHz 22
INPUT VOLTAGE
VCM Common-mode voltage range(1) (V–) – 0.1 (V+) – 2 V
CMRR Common-mode rejection ratio VS = ±2 V, (V–) – 0.1 V < VCM < (V+) – 2 V,
TA = –40°C to +125°C		 100 dB
VS = ±18 V, (V–) – 0.1 V < VCM < (V+) – 2 V,
TA = –40°C to +125°C		 95 110
INPUT IMPEDANCE
Differential 100 || 3 MΩ || pF
Common-mode 6 || 3 1012 Ω || pF
OPEN-LOOP GAIN
AOL Open-loop voltage gain VS = 36 V,
(V–) + 0.35 V < VO < (V+) – 0.35 V,
TA = –40°C to +125°C		 94 130 dB
FREQUENCY RESPONSE
GBP Gain bandwidth product 1.2 MHz
SR Slew rate G = +1 0.4 V/µs
tS Settling time To 0.1%, VS = ±18 V, G = +1, 10-V step 20 µs
To 0.01% (12-bit), VS = ±18 V, G = +1,
10-V step		 28
THD+N Total harmonic distortion + noise G = +1, f = 1 kHz, VO = 3 VRMS 0.0002%
OUTPUT
VO Voltage output swing from rail VS = ±18 V, RL = 10 kΩ; TA = –40°C to +125°C (V–) + 0.2 (V+) – 0.3 V
RL = 10 kΩ, AOL ≥ 94 dB,
TA = –40°C to +125°C		 (V–) + 0.35 (V+) – 0.35
ISC Short-circuit current –20 17 mA
CLOAD Capacitive load drive See Typical Characteristics: Table of Graphs pF
RO Open-loop output resistance f = 1 MHz, IO = 0 A 900 Ω
POWER SUPPLY
VS Specified voltage range 2.7 36 V
IQ Quiescent current per amplifier IO = 0 A, TA = –40°C to +125°C 125 175 µA
(1) The input range can be extended beyond (V+) – 2 V up to V+. See the Typical Characteristics: Table of Graphs and Application and Implementation sections for additional information.