TLV313ファミリは1、2、4チャネルの高精度オペアンプで、低消費電力と優れた性能を実現しています。このため、ウェアラブル機器、公共事業の計量、ビルディング・オートメーション、貨幣計数機など広範なアプリケーションに適しています。このファミリはレール・ツー・レール入出力(RRIO)、低い静止電流(標準値65μA)、広い帯域幅(1MHz)、非常に低いノイズ(1kHzにおいて26nV/√Hz)という特長があるため、コストと性能の適切なバランスが必要な各種のバッテリ駆動アプリケーションに最適です。さらに、入力バイアス電流が低いため、これらのデバイスはソース・インピーダンスがメガオーム単位のアプリケーションでも使用できます。
TLV313デバイスは堅牢に設計されており、150pFまでの容量性負荷に対するユニティ・ゲイン安定性、RF/EMI除去フィルタの搭載、オーバードライブ状態で位相反転が発生しない、高い静電放電(ESD)保護(4kV HBM)といった特長があるため、回路設計が容易です。
これらのデバイスは、最低+1.8V (±0.9V)、最大+5.5V (±2.75V)の電圧で動作するよう最適化されており、拡張温度範囲の-40℃~+125℃が定格内です。
1チャネルのTLV313デバイスは、SC70-5とSOT23-5の両方のパッケージで供給されます。2チャネルのTLV2313デバイスはSOIC-8およびVSSOP-8パッケージで、4チャネルのTLV4313デバイスはTSSOP-14パッケージで供給されます。
型番 | パッケージ | 本体サイズ(公称) |
---|---|---|
TLV313 | SC70 (5) | 2.00mm×1.25mm |
SOT23 (5) | 2.90mm×1.60mm | |
TLV2313 | SOIC (8) | 4.90mm×3.91mm |
VSSOP (8) | 3.00mm×3.00mm | |
TLV4313 | TSSOP (14) | 5.00mm×4.40mm |
DEVICE | NO. OF CHANNELS |
PACKAGE LEADS | ||||
---|---|---|---|---|---|---|
SC70 | SOT23 | SOIC | VSSOP | TSSOP | ||
TLV313 | 1 | 5 | 5 | — | — | — |
TLV2313 | 2 | — | — | 8 | 8 | — |
TLV4313 | 4 | — | — | — | — | 14 |
PIN | I/O | DESCRIPTION | ||
---|---|---|---|---|
NAME | D (SOIC) | DGK (VSSOP) | ||
V– | 4 | 4 | — | Negative (lowest) power supply |
V+ | 8 | 8 | — | Positive (highest) power supply |
OUT A | 1 | 1 | O | Output, channel A |
OUT B | 7 | 7 | O | Output, channel B |
–IN A | 2 | 2 | I | Inverting input, channel A |
+IN A | 3 | 3 | I | Noninverting input, channel A |
–IN B | 6 | 6 | I | Inverting input, channel B |
+IN B | 5 | 5 | I | Noninverting input, channel B |
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | PW (TSSOP) | ||
V– | 11 | — | Negative (lowest) power supply |
V+ | 4 | — | Positive (highest) power supply |
OUT A | 1 | O | Output, channel A |
OUT B | 7 | O | Output, channel B |
OUT C | 8 | O | Output, channel C |
OUT D | 14 | O | Output, channel D |
–IN A | 2 | I | Inverting input, channel A |
+IN A | 3 | I | Noninverting input, channel A |
–IN B | 6 | I | Inverting input, channel B |
+IN B | 5 | I | Noninverting input, channel B |
–IN C | 9 | I | Inverting input, channel C |
+IN C | 10 | I | Noninverting input, channel C |
–IN D | 13 | I | Inverting input, channel D |
+IN D | 12 | I | Noninverting input, channel D |
MIN | MAX | UNIT | ||
---|---|---|---|---|
Voltage | Supply voltage | 7 | V | |
Signal input terminals(2) | (V−) − (0.5) | (V+) + 0.5 | V | |
Current | Signal input terminals(2) | –10 | 10 | mA |
Output short circuit(3) | Continuous | |||
Temperature | Operating, TA | –40 | 150 | °C |
Junction, TJ | 150 | °C | ||
Storage, Tstg | –65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±4000 | V |
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±1000 |
MIN | MAX | UNIT | ||
---|---|---|---|---|
VS | Supply voltage | 1.8 | 5.5 | V |
TA | Specified temperature range | –40 | 125 | °C |
THERMAL METRIC(1) | TLV313 | UNIT | ||
---|---|---|---|---|
DBV (SOT23) | DCK (SC70) | |||
5 PINS | 5 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 228.5 | 281.4 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 99.1 | 91.6 | °C/W |
RθJB | Junction-to-board thermal resistance | 54.6 | 59.6 | °C/W |
ψJT | Junction-to-top characterization parameter | 7.7 | 1.5 | °C/W |
ψJB | Junction-to-board characterization parameter | 53.8 | 58.8 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | N/A | N/A | °C/W |
THERMAL METRIC(1) | TLV2313 | UNIT | ||
---|---|---|---|---|
D (SOIC) | DGK (VSSOP) | |||
8 PINS | 8 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 138.4 | 191.2 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 89.5 | 61.9 | °C/W |
RθJB | Junction-to-board thermal resistance | 78.6 | 111.9 | °C/W |
ψJT | Junction-to-top characterization parameter | 29.9 | 5.1 | °C/W |
ψJB | Junction-to-board characterization parameter | 78.1 | 110.2 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | N/A | N/A | °C/W |
THERMAL METRIC(1) | TLV4313 | UNIT | |
---|---|---|---|
PW (TSSOP) | |||
14 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 121.0 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 49.4 | °C/W |
RθJB | Junction-to-board thermal resistance | 62.8 | °C/W |
ψJT | Junction-to-top characterization parameter | 5.9 | °C/W |
ψJB | Junction-to-board characterization parameter | 62.2 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | N/A | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
OFFSET VOLTAGE | |||||||
VOS | Input offset voltage | 0.75 | 3 | mV | |||
dVOS/dT | Input offset voltage vs temperature | TA = –40°C to 125°C | 2 | μV/°C | |||
PSRR | Power-supply rejection ratio | 74 | 90 | dB | |||
INPUT VOLTAGE RANGE | |||||||
VCM | Common-mode voltage range | No phase reversal, rail-to-rail input | (V–) – 0.2 | (V+) + 0.2 | V | ||
CMRR | Common-mode rejection ratio | (VS–) – 0.2 V < VCM < (VS+) – 1.3 V | 85 | dB | |||
VCM = –0.2 V to 5.7 V | 64 | 80 | dB | ||||
INPUT BIAS CURRENT | |||||||
IB | Input bias current | ±1 | pA | ||||
IOS | Input offset current | ±1 | pA | ||||
NOISE | |||||||
Input voltage noise (peak-to-peak) | f = 0.1 Hz to 10 Hz | 6 | μVPP | ||||
en | Input voltage noise density | f = 10 kHz | 22 | nV/√Hz | |||
f = 1 kHz | 26 | nV/√Hz | |||||
in | Input current noise density | f = 1 kHz | 5 | fA/√Hz | |||
INPUT CAPACITANCE | |||||||
CIN | Differential | 1 | pF | ||||
Common-mode | 5 | pF | |||||
OPEN-LOOP GAIN | |||||||
AOL | Open-loop voltage gain | 0.05 V < VO < (V+) – 0.05 V, RL = 100 kΩ | 104 | dB | |||
0.3 V < VO < (V+) – 0.3 V, RL = 2 kΩ | 100 | 110 | dB | ||||
Phase margin | VS = 5.0 V, G = +1 | 65 | ° | ||||
FREQUENCY RESPONSE | |||||||
GBW | Gain-bandwidth product | VS = 5.0 V, CL = 10 pF | 1 | MHz | |||
SR | Slew rate | VS = 5.0 V, G = +1 | 0.5 | V/μs | |||
tS | Settling time | To 0.01%, VS = 5.0 V, 2-V step , G = +1 | 6 | μs | |||
Overload recovery time | VS = 5.0 V, VIN × Gain > VS | 3 | μs | ||||
OUTPUT | |||||||
VO | Voltage output swing from supply rails | RL = 100 kΩ(2) | 5 | 20 | mV | ||
RL = 2 kΩ(2) | 75 | 100 | mV | ||||
ISC | Short-circuit current | ±15 | mA | ||||
RO | Open-loop output impedance | 2300 | Ω | ||||
POWER SUPPLY | |||||||
VS | Specified voltage range | 1.8 (±0.9) | 5.5 (±2.75) | V | |||
IQ | Quiescent current per amplifier | TA = –40°C to 125°C, VS = 5.0 V, IO = 0 mA | 65 | 90 | µA | ||
Power-on time | VS = 0 V to 5 V, to 90% IQ level | 10 | µs |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
OFFSET VOLTAGE | |||||||
VOS | Input offset voltage | 0.75 | 3 | mV | |||
dVOS/dT | Input offset voltage vs temperature | TA = –40°C to 125°C | 2 | μV/°C | |||
PSRR | Power-supply rejection ratio | 74 | 90 | dB | |||
INPUT VOLTAGE RANGE | |||||||
VCM | Common-mode voltage range | No phase reversal, rail-to-rail input | (V–) – 0.2 | (V+) + 0.2 | V | ||
CMRR | Common-mode rejection ratio | (VS–) – 0.2 V < VCM < (VS+) – 1.3 V | 85 | dB | |||
VCM = –0.2 V to +1.8 V | 73 | dB | |||||
INPUT BIAS CURRENT | |||||||
IB | Input bias current | ±1 | pA | ||||
IOS | Input offset current | ±1 | pA | ||||
NOISE | |||||||
Input voltage noise (peak-to-peak) | f = 0.1 Hz to 10 Hz | 6 | μVPP | ||||
en | Input voltage noise density | f = 10 kHz | 22 | nV/√Hz | |||
f = 1 kHz | 26 | nV/√Hz | |||||
in | Input current noise density | f = 1 kHz | 5 | fA/√Hz | |||
INPUT CAPACITANCE | |||||||
CIN | Differential | 1 | pF | ||||
Common-mode | 5 | pF | |||||
OPEN-LOOP GAIN | |||||||
AOL | Open-loop voltage gain | 0.1 V < VO < (V+) – 0.1 V, RL = 10 kΩ | 110 | dB | |||
0.05 V < VO < (V+) – 0.05 V, RL = 100 kΩ | 110 | dB | |||||
FREQUENCY RESPONSE | |||||||
GBW | Gain-bandwidth product | CL = 10 pF | 0.9 | MHz | |||
SR | Slew rate | G = +1 | 0.45 | V/μs | |||
tS | Settling time | To 0.01%, VS = 5.0 V, 2-V step , G = +1 | 6 | μs | |||
Overload recovery time | VS = 5.0 V, VIN × Gain > VS | 3 | μs | ||||
OUTPUT | |||||||
VO | Voltage output swing from supply rails | RL = 100 kΩ(2) | 5 | mV | |||
RL = 2 kΩ(2) | 25 | mV | |||||
ISC | Short-circuit current | ±6 | mA | ||||
RO | Open-loop output impedance | 2300 | Ω | ||||
POWER SUPPLY | |||||||
VS | Specified voltage range | 1.8 (±0.9) | 5.5 (±2.75) | V | |||
IQ | Quiescent current per amplifier | TA = –40°C to 125°C, VS = 5.0 V, IO = 0 mA | 65 | 90 | µA | ||
Power-on time | VS = 0 V to 5 V, to 90% IQ level | 10 | µs |
TITLE | FIGURE |
---|---|
Open-Loop Gain and Phase vs Frequency | Figure 1 |
Quiescent Current vs Supply Voltage | Figure 2 |
Offset Voltage Production Distribution | Figure 3 |
Offset Voltage vs Common-Mode Voltage (Maximum Supply) | Figure 4 |
CMRR and PSRR vs Frequency (RTI) | Figure 5 |
0.1-Hz to 10-Hz Input Voltage Noise (5.5 V) | Figure 6 |
Input Voltage Noise Spectral Density vs Frequency (1.8 V, 5.5 V) | Figure 7 |
Input Bias and Offset Current vs Temperature | Figure 8 |
Open-Loop Output Impedance vs Frequency | Figure 9 |
Maximum Output Voltage vs Frequency and Supply Voltage | Figure 10 |
Output Voltage Swing vs Output Current (over Temperature) | Figure 11 |
Closed-Loop Gain vs Frequency, G = 1, –1, 10 (1.8 V) | Figure 12 |
Small-Signal Step Response, Noninverting (1.8 V) | Figure 13 |
Small-Signal Step Response, Noninverting ( 5.5 V) | Figure 14 |
Large-Signal Step Response, Noninverting (1.8 V) | Figure 15 |
Large-Signal Step Response, Noninverting ( 5.5 V) | Figure 16 |
No Phase Reversal | Figure 17 |
EMIRR IN+ vs Frequency | Figure 18 |
The TLVx313 family of operational amplifiers are general-purpose devices that are ideal for a wide range of portable, low-cost applications. Rail-to-rail input and output swings, low quiescent current, and wide dynamic range make the op amps well-suited for driving sampling analog-to-digital converters (ADCs) as well as other single-supply applications.
The TLV313 series is fully specified and tested from 1.8 V to 5.5 V (±0.9 V to ±2.75 V). Parameters that vary with supply voltage are illustrated in the Typical Characteristics section.
The input common-mode voltage range of the TLV313 series extends 200 mV beyond the supply rails. This performance is achieved with a complementary input stage: an N-channel input differential pair in parallel with a P-channel differential pair, as shown in the Functional Block Diagram section. The N-channel pair is active for input voltages close to the positive rail, typically (V+) – 1.3 V to 200 mV above the positive supply, while the P-channel pair is on for inputs from 200 mV below the negative supply to approximately (V+) – 1.3 V. There is a small transition region, typically (V+) – 1.4 V to (V+) – 1.2 V, in which both pairs are on. This 200-mV transition region may vary up to 300 mV with process variation. Thus, the transition region (both stages on) may range from (V+) – 1.7 V to (V+) – 1.5 V on the low end, up to (V+) – 1.1 V to (V+) – 0.9 V on the high end. Within this transition region, PSRR, CMRR, offset voltage, offset drift, and THD may be degraded compared to device operation outside this region.
Designed as a micro-power, low-noise operational amplifier, the TLV313 device delivers a robust output drive capability. A class AB output stage with common-source transistors is used to achieve full rail-to-rail output swing capability. For resistive loads up to 100 kΩ, the output swings typically to within 5 mV of either supply rail regardless of the power-supply voltage applied. Different load conditions change the ability of the amplifier to swing close to the rails, as shown in Figure 12.
CMRR for the TLV313 device is specified in several ways so the best match for a given application may be used; see the Electrical Characteristics. First, the CMRR of the device in the common-mode range below the transition region [VCM < (V+) – 1.3 V] is given. This specification is the best indicator of the capability of the device when the application requires use of one of the differential input pairs. Second, the CMRR over the entire common-mode range is specified at (VCM = –0.2 V to 5.7 V). This last value includes the variations seen through the transition region, as shown in Figure 4.
The TLV313 device is designed to be used in applications where driving a capacitive load is required. As with all op amps, there may be specific instances where the TLV313 device may become unstable. The particular op amp circuit configuration, layout, gain, and output loading are some of the factors to consider when establishing whether or not an amplifier is stable in operation. An op amp in the unity-gain (+1-V/V) buffer configuration that drives a capacitive load exhibits a greater tendency to be unstable than an amplifier operated at a higher noise gain. The capacitive load, in conjunction with the op amp output resistance, creates a pole within the feedback loop that degrades the phase margin. The degradation of the phase margin increases as the capacitive loading increases. When operating in the unity-gain configuration, the TLV313 device remains stable with a pure capacitive load up to approximately 1 nF. The equivalent series resistance (ESR) of some capacitors (CL greater than 1 μF) is sufficient to alter the phase characteristics in the feedback loop such that the amplifier remains stable. Increasing the amplifier closed-loop gain allows the amplifier to drive increasingly larger capacitance. This increased capability is evident when observing the overshoot response of the amplifier at higher voltage gains.
One technique for increasing the capacitive load drive capability of the amplifier when it operates in a unity-gain configuration is to insert a small resistor, typically 10 Ω to 20 Ω, in series with the output, as shown in Figure 19. This resistor significantly reduces the overshoot and ringing associated with large capacitive loads. One possible problem with this technique is that a voltage divider is created with the added series resistor and any resistor connected in parallel with the capacitive load. The voltage divider introduces a gain error at the output that reduces the output swing.
Operational amplifiers vary with regard to the susceptibility of the device to electromagnetic interference (EMI). If conducted EMI enters the op amp, the dc offset observed at the amplifier output may shift from the nominal value while EMI is present. This shift is a result of signal rectification associated with the internal semiconductor junctions. While all op amp pin functions may be affected by EMI, the signal input pins are likely to be the most susceptible. The TLV313 family incorporates an internal input low-pass filter that reduces the amplifiers response to EMI. Both common-mode and differential mode filtering are provided by this filter. The filter is designed for a cutoff frequency of approximately 35 MHz (–3 dB), with a roll-off of 20 dB per decade.
Texas Instruments has developed the ability to accurately measure and quantify the immunity of an operational amplifier over a broad frequency spectrum extending from 10 MHz to 6 GHz. The EMI rejection ratio (EMIRR) metric allows op amps to be directly compared by the EMI immunity. Figure 18 illustrates the results of this testing on the TLV313 family. Detailed information may be found in EMI Rejection Ratio of Operational Amplifiers (SBOA128), available for download from www.ti.com.
The TLV313 devices have a single functional mode. The devices are powered on as long as the power-supply voltage is between 1.8 V (±0.9 V) and 5.5 V (±2.75 V).
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
The TLVx313 devices are a family of low-power, rail-to-rail input and output operational amplifiers specifically designed for portable applications. The devices operate from 1.8 V to 5.5 V, are unity-gain stable, and are suitable for a wide range of general-purpose applications. The class AB output stage is capable of driving ≤ 10-kΩ loads connected to any point between V+ and ground. The input common-mode voltage range includes both rails, and allows the TLV313 family to be used in virtually any single-supply application.
A typical application for an operational amplifier is an inverting amplifier, as shown in Figure 20. An inverting amplifier takes a positive voltage on the input and outputs a signal inverted to the input, making a negative voltage of the same magnitude. In the same manner, the amplifier also makes negative input voltages positive on the output. In addition, amplification may be added by selecting the input resistor RI and the feedback resistor RF.
The supply voltage must be chosen to be larger than the input voltage range and the desired output range. The limits of the input common-mode range (VCM) and the output voltage swing to the rails (VO) must also be considered. For instance, this application scales a signal of ±0.5 V (1 V) to ±1.8 V (3.6 V). Setting the supply at ±2.5 V is sufficient to accommodate this application.
Determine the gain required by the inverting amplifier using Equation 1 and Equation 2:
When the desired gain is determined, choose a value for RI or RF. Choosing a value in the kilohm range is desirable for general-purpose applications because the amplifier circuit uses currents in the milliamp range. This milliamp current range ensures the device does not draw too much current. The trade-off is that very large resistors (100s of kilohms) draw the smallest current but generate the highest noise. Small resistors (100s of ohms) generate low noise but draw high current. This example uses 10 kΩ for RI, meaning 36 kΩ is used for RF. The values are determined by Equation 3:
When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often required. The simplest way to establish this limited bandwidth is to place an RC filter at the noninverting terminal of the amplifier, as shown in Figure 22.
If even more attenuation is needed, a multiple pole filter is required. The Sallen-Key filter may be used for this task, as shown in Figure 23. For best results, the amplifier must have a bandwidth that is eight to 10 times the filter frequency bandwidth. Failure to follow this guideline may result in phase shift of the amplifier.
The TLVx313 family is specified for operation from 1.8 V to 5.5 V (±0.9 V to ±2.75 V); many specifications apply from –40°C to +125°C. The Typical Characteristics section presents parameters that may exhibit significant variance with regard to operating voltage or temperature.
CAUTION
Supply voltages larger than 7 V can permanently damage the device (see the Absolute Maximum Ratings table).
Place 0.1-μF bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or high-impedance power supplies. For more detailed information on bypass capacitor placement, refer to the Layout Guidelines section.
The TLV313 family incorporates internal electrostatic discharge (ESD) protection circuits on all pins. In the case of input and output pins, this protection primarily consists of current-steering diodes connected between the input and power-supply pins. The ESD protection diodes also provide in-circuit, input overdrive protection, as long as the current is limited to 10 mA as stated in the Absolute Maximum Ratings. Figure 24 shows how a series input resistor may be added to the driven input to limit the input current. The added resistor contributes thermal noise at the amplifier input and the value must be kept to a minimum in noise-sensitive applications.
For best operational performance of the device, use good printed circuit board (PCB) layout practices, including:
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TI REFERENCE DESIGNS AND OTHER ITEMS DESCRIBED ABOVE ARE PROVIDED “AS IS” AND WITH ALL FAULTS. TI DISCLAIMS ALL OTHER WARRANTIES OR REPRESENTATIONS, EXPRESS OR IMPLIED, REGARDING THE REFERENCE DESIGNS OR USE OF THE REFERENCE DESIGNS, INCLUDING BUT NOT LIMITED TO ACCURACY OR COMPLETENESS, TITLE, ANY EPIDEMIC FAILURE WARRANTY AND ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF ANY THIRD PARTY INTELLECTUAL PROPERTY RIGHTS.
TI SHALL NOT BE LIABLE FOR AND SHALL NOT DEFEND OR INDEMNIFY DESIGNERS AGAINST ANY CLAIM, INCLUDING BUT NOT LIMITED TO ANY INFRINGEMENT CLAIM THAT RELATES TO OR IS BASED ON ANY COMBINATION OF PRODUCTS AS DESCRIBED IN A TI REFERENCE DESIGN OR OTHERWISE. IN NO EVENT SHALL TI BE LIABLE FOR ANY ACTUAL, DIRECT, SPECIAL, COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF THE REFERENCE DESIGNS OR USE OF THE REFERENCE DESIGNS, AND REGARDLESS OF WHETHER TI HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
Unless TI has explicitly designated an individual product as meeting the requirements of a particular industry standard (e.g., ISO/TS 16949 and ISO 26262), TI is not responsible for any failure to meet such industry standard requirements.
Where TI specifically promotes products as facilitating functional safety or as compliant with industry functional safety standards, such products are intended to help enable customers to design and create their own applications that meet applicable functional safety standards and requirements. Using products in an application does not by itself establish any safety features in the application. Designers must ensure compliance with safety-related requirements and standards applicable to their applications. Designer may not use any TI products in life-critical medical equipment unless authorized officers of the parties have executed a special contract specifically governing such use. Life-critical medical equipment is medical equipment where failure of such equipment would cause serious bodily injury or death (e.g., life support, pacemakers, defibrillators, heart pumps, neurostimulators, and implantables). Such equipment includes, without limitation, all medical devices identified by the U.S. Food and Drug Administration as Class III devices and equivalent classifications outside the U.S.
TI may expressly designate certain products as completing a particular qualification (e.g., Q100, Military Grade, or Enhanced Product). Designers agree that it has the necessary expertise to select the product with the appropriate qualification designation for their applications and that proper product selection is at Designers’ own risk. Designers are solely responsible for compliance with all legal and regulatory requirements in connection with such selection.
Designer will fully indemnify TI and its representatives against any damages, costs, losses, and/or liabilities arising out of Designer’s non-compliance with the terms and provisions of this Notice.
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