JAJSCS9B November   2016  – August 2017 TLV2316-Q1 , TLV316-Q1 , TLV4316-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information: TLV316-Q1
    5. 7.5 Thermal Information: TLV2316-Q1
    6. 7.6 Thermal Information: TLV4316-Q1
    7. 7.7 Electrical Characteristics
    8. 7.8 Typical Characteristics: Table of Graphs
    9. 7.9 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Operating Voltage
      2. 8.3.2 Rail-to-Rail Input
      3. 8.3.3 Rail-to-Rail Output
      4. 8.3.4 Common-Mode Rejection Ratio (CMRR)
      5. 8.3.5 Capacitive Load and Stability
      6. 8.3.6 EMI Susceptibility and Input Filtering
      7. 8.3.7 Overload Recovery
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 System Examples
  10. 10Power Supply Recommendations
    1. 10.1 Input and ESD Protection
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントのサポート
      1. 12.1.1 関連資料
    2. 12.2 関連リンク
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Pin Configuration and Functions

TLV316-Q1 DBV Package
5-Pin SOT-23
Top View
TLV316-Q1 TLV2316-Q1 TLV4316-Q1 po_sot23-5_bos406.gif

Pin Functions: TLV316-Q1

PIN I/O DESCRIPTION
NAME NO.
–IN 4 I Inverting input
+IN 3 I Noninverting input
OUT 1 O Output
V– 2 — Negative (lowest) supply or ground (for single-supply operation)
V+ 5 — Positive (highest) supply
TLV2316-Q1 DGK Package
8-Pin VSSOP
Top View
TLV316-Q1 TLV2316-Q1 TLV4316-Q1 po_so_msop_bos406.gif

Pin Functions: TLV2316 -Q1

PIN I/O DESCRIPTION
NAME NO.
–IN A 2 I Inverting input, channel A
+IN A 3 I Noninverting input, channel A
–IN B 6 I Inverting input, channel B
+IN B 5 I Noninverting input, channel B
OUT A 1 O Output, channel A
OUT B 7 O Output, channel B
V– 4 — Negative (lowest) supply or ground (for single-supply operation)
V+ 8 — Positive (highest) supply
TLV4316-Q1 PW Package
14-Pin TSSOP
Top View
TLV316-Q1 TLV2316-Q1 TLV4316-Q1 po_pw_tssop-14_bos563.gif

Pin Functions: TLV4316-Q1

PIN I/O DESCRIPTION
NAME NO.
–IN A 2 I Inverting input, channel A
+IN A 3 I Noninverting input, channel A
–IN B 6 I Inverting input, channel B
+IN B 5 I Noninverting input, channel B
–IN C 9 I Inverting input, channel C
+IN C 10 I Noninverting input, channel C
–IN D 13 I Inverting input, channel D
+IN D 12 I Noninverting input, channel D
OUT A 1 O Output, channel A
OUT B 7 O Output, channel B
OUT C 8 O Output, channel C
OUT D 14 O Output, channel D
V– 11 — Negative (lowest) supply or ground (for single-supply operation)
V+ 4 — Positive (highest) supply