8.3.1 Rail-to-Rail Input Operation

The TLV237x-Q1 input stage consists of two differential transistor pairs, NMOS and PMOS, that operate together to achieve rail-to-rail input operation. The transition point between these two pairs can be seen in Figure 1 through Figure 3 for a 2.7-V, 5-V, and 15-V supply. As the common-mode input voltage approaches the positive supply rail, the input pair switches from the PMOS differential pair to the NMOS differential pair. This transition occurs approximately 1.35 V from the positive rail and results in a change in offset voltage due to different device characteristics between the NMOS and PMOS pairs. If the input signal to the device is large enough to swing between both rails, this transition results in a reduction in common-mode rejection ratio (CMRR). If the input signal does not swing between both rails, it is best to bias the signal in the region where only one input pair is active. This is the region in Figure 1 through Figure 3 where the offset voltage varies slightly across the input range and optimal CMRR can be achieved. This has the greatest impact when operating from a 2.7-V supply voltage.

8.3.2 Driving a Capacitive Load

When the amplifier is configured in this manner, capacitive loading directly on the output decreases the device’s phase margin, leading to high-frequency ringing or oscillations. Therefore, for capacitive loads of greater than
10 pF, TI recommends placing a resistor in series (R_NULL) with the output of the amplifier, as shown in Figure 28. A minimum value of 20 Ω works well for most applications.

Figure 28. Driving a Capacitive Load

8.3.3 Offset Voltage

The output offset voltage, (V_OO) is the sum of the input offset volt age (V_IO) and both input bias currents (I_IB) times the corresponding gains. The schematic and formula in Figure 29 can be used to calculate the output offset voltage.

Figure 29. Output Offset Voltage Model

8.3.4 General Configurations

When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often required. The simplest way to accomplish this is to place an RC filter at the noninverting terminal of the amplifier (see Figure 30).

Figure 30. Single-Pole Low-Pass Filter

If even more attenuation is required, a multiple pole filter is required. The Sallen-Key filter can be used for this task (see Figure 31). For best results, the amplifier must have a bandwidth that is 8 to 10 times the filter frequency bandwidth. Failure to do this can result in phase shift of the amplifier.

Figure 31. 2-Pole Low-Pass Sallen-Key Filter