SBOSAG5 December   2024  – December 2024 TLV2888

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information: TLV2888
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Input Common-Mode Range
      2. 6.3.2 Phase-Reversal Protection
      3. 6.3.3 Chopping Transients
      4. 6.3.4 EMI Rejection
      5. 6.3.5 Electrical Overstress
      6. 6.3.6 MUX-Friendly Inputs
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Basic Noise Calculations
    2. 7.2 Typical Applications
      1. 7.2.1 High-Side Current Sensing
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
      2. 7.2.2 Programmable Current Source
      3. 7.2.3 Programmable Current Source For A Grounded Load
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 PSpice® for TI
        2. 8.1.1.2 TINA-TI™ Simulation Software (Free Download)
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • D|8
サーマルパッド・メカニカル・データ
発注情報

5.4 Thermal Information: TLV2888

THERMAL METRIC(1) TLV2888 UNIT
D (SOIC)
8 PINS
RθJA Junction-to-ambient thermal resistance 148 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 88 °C/W
RθJB Junction-to-board thermal resistance 91 °C/W
ΨJT Junction-to-top characterization parameter 37 °C/W
ΨJB Junction-to-board characterization parameter 91 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.