SBOS754A March   2016  – March 2016 TLV2314 , TLV314 , TLV4314

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information: TLV314
    5. 7.5 Thermal Information: TLV2314
    6. 7.6 Thermal Information: TLV4314
    7. 7.7 Electrical Characteristics
    8. 7.8 Typical Characteristics
    9. 7.9 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Operating Voltage
      2. 8.3.2 Rail-to-Rail Input
      3. 8.3.3 Rail-to-Rail Output
      4. 8.3.4 Common-Mode Rejection Ratio (CMRR)
      5. 8.3.5 Capacitive Load and Stability
      6. 8.3.6 EMI Susceptibility and Input Filtering
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 System Examples
  10. 10Power Supply Recommendations
    1. 10.1 Input and ESD Protection
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Related Links
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

6 Pin Configuration and Functions

DBV Package: TLV314
5-Pin SOT-23
Top View
TLV314 TLV2314 TLV4314 po_sot23-5_bos406.gif
DCK Package: TLV314
5-Pin SC70
Top View
TLV314 TLV2314 TLV4314 po_sc70_bos406.gif

Pin Functions: TLV314

PIN I/O DESCRIPTION
NAME NO.
DBV DCK
–IN 4 3 I Inverting input
+IN 3 1 I Noninverting input
OUT 1 4 O Output
V– 2 2 Negative (lowest) supply
V+ 5 5 Positive (highest) supply
D, DGK Package: TLV2314
8-Pin SOIC or VSSOP
Top View
TLV314 TLV2314 TLV4314 po_so_msop_bos406.gif

Pin Functions: TLV2314

PIN I/O DESCRIPTION
NAME NO.
–IN A 2 I Inverting input, channel A
+IN A 3 I Noninverting input, channel A
–IN B 6 I Inverting input, channel B
+IN B 5 I Noninverting input, channel B
OUT A 1 O Output, channel A
OUT B 7 O Output, channel B
V– 4 Negative (lowest) supply
V+ 8 Positive (highest) supply
PW Package: TLV4314
14-Pin TSSOP
Top View
TLV314 TLV2314 TLV4314 po_pw_tssop-14_bos563.gif

Pin Functions: TLV4314

PIN I/O DESCRIPTION
NAME NO.
–IN A 2 I Inverting input, channel A
+IN A 3 I Noninverting input, channel A
–IN B 6 I Inverting input, channel B
+IN B 5 I Noninverting input, channel B
–IN C 9 I Inverting input, channel C
+IN C 10 I Noninverting input, channel C
–IN D 13 I Inverting input, channel D
+IN D 12 I Noninverting input, channel D
OUT A 1 O Output, channel A
OUT B 7 O Output, channel B
OUT C 8 O Output, channel C
OUT D 14 O Output, channel D
V– 11 Negative (lowest) supply
V+ 4 Positive (highest) supply