JAJSHF9E September   2008  – September 2019 TLV320AIC3204

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      ブロック概略図
  4. 4 改訂履歴
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics, ADC
    6. 7.6  Electrical Characteristics, Bypass Outputs
    7. 7.7  Electrical Characteristics, Microphone Interface
    8. 7.8  Electrical Characteristics, Audio DAC Outputs
    9. 7.9  Electrical Characteristics, LDO
    10. 7.10 Electrical Characteristics, Misc.
    11. 7.11 Electrical Characteristics, Logic Levels
    12. 7.12 I2S LJF and RJF Timing in Master Mode (see )
    13. 7.13 I2S LJF and RJF Timing in Slave Mode (see )
    14. 7.14 DSP Timing in Master Mode (see )
    15. 7.15 DSP Timing in Slave Mode (see )
    16. 7.16 Digital Microphone PDM Timing (see )
    17. 7.17 I2C Interface Timing
    18. 7.18 SPI Interface Timing (See )
    19. 7.19 Typical Characteristics
    20. 7.20 Typical Characteristics, FFT
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Device Connections
        1. 9.3.1.1 Digital Pins
          1. 9.3.1.1.1 Multifunction Pins
        2. 9.3.1.2 Analog Pins
      2. 9.3.2 Analog Audio IO
        1. 9.3.2.1 Analog Low Power Bypass
        2. 9.3.2.2 ADC Bypass Using Mixer Amplifiers
        3. 9.3.2.3 Headphone Outputs
        4. 9.3.2.4 Line Outputs
      3. 9.3.3 ADC
        1. 9.3.3.1 ADC Processing
          1. 9.3.3.1.1 ADC Processing Blocks
      4. 9.3.4 DAC
        1. 9.3.4.1 DAC Processing Blocks
      5. 9.3.5 PowerTune
      6. 9.3.6 Digital Audio IO Interface
      7. 9.3.7 Clock Generation and PLL
      8. 9.3.8 Control Interfaces
        1. 9.3.8.1 I2C Control
        2. 9.3.8.2 SPI Control
    4. 9.4 Device Functional Modes
    5. 9.5 Register Map
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
        1. 10.2.1.1 Reference Filtering Capacitor
        2. 10.2.1.2 MICBIAS
      2. 10.2.2 Detailed Design Procedures
        1. 10.2.2.1 Analog Input Connection
        2. 10.2.2.2 Analog Output Connection
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13デバイスおよびドキュメントのサポート
    1. 13.1 ドキュメントのサポート
      1. 13.1.1 関連資料
    2. 13.2 ドキュメントの更新通知を受け取る方法
    3. 13.3 コミュニティ・リソース
    4. 13.4 商標
    5. 13.5 静電気放電に関する注意事項
    6. 13.6 Glossary
  14. 14メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Pin Configuration and Functions

This document describes signals that take on different names depending on how they are configured. In such cases, the different names are placed together and separated by slash (/) characters. For example, "SCL/SS". Active low signals are represented by overbars.

RHB Package
(Bottom View)
TLV320AIC3204 rhb_po_las549.gif

Pin Functions

PIN NAME TYPE(1) DESCRIPTION
1 MCLK DI Master Clock Input
2 BCLK DIO Audio serial data bus (primary) bit clock
3 WCLK DIO Audio serial data bus (primary) word clock
4 DIN / MFP1 DI Primary function:
Audio serial data bus data input
Secondary function:
Digital Microphone Input
General Purpose Clock Input
General Purpose Input
5 DOUT / MFP2 DO Primary function:
Audio serial data bus data output
Secondary function:
General Purpose Output
Clock Output
INT1 Output
INT2 Output
Audio serial data bus (secondary) bit clock output
Audio serial data bus (secondary) word clock output
6 IOVDD Power IO voltage supply 1.1V – 3.6V
7 IOVSS Ground IO ground supply
8 SCLK / MFP3 DI Primary function: (SPI_Select = 1)
SPI serial clock
Secondary function: (SPI_Select = 0)
Headphone-detect input
Digital microphone input
Audio serial data bus (secondary) bit clock input
Audio serial data bus (secondary) DAC or common word clock input
Audio serial data bus (secondary) ADC word clock input
Audio serial data bus (secondary) data input
General Purpose Input
9 SCL/SS DI I2C interface serial clock (SPI_Select = 0)
SPI interface mode chip-select signal (SPI_Select = 1)
10 SDA/MOSI DI I2C interface mode serial data input (SPI_Select = 0)
SPI interface mode serial data input (SPI_Select = 1)
11 MISO / MFP4 DO Primary function: (SPI_Select = 1)
Serial data output
Secondary function: (SPI_Select = 0)
General purpose output
CLKOUT output
INT1 output
INT2 output
Audio serial data bus (primary) ADC word clock output
Digital microphone clock output
Audio serial data bus (secondary) data output
Audio serial data bus (secondary) bit clock output
Audio serial data bus (secondary) word clock output
12 SPI_ SELECT DI Control mode select pin ( 1 = SPI, 0 = I2C )
13 IN1_L AI Multifunction Analog Input,
or Single-ended configuration: MIC 1 or Line 1 left
or Differential configuration: MIC or Line right, negative
14 IN1_R AI Multifunction Analog Input,
or Single-ended configuration: MIC 1 or Line 1 right
or Differential configuration: MIC or Line right, positive
15 IN2_L AI Multifunction Analog Input,
or Single-ended configuration: MIC 2 or Line 2 left
or Differential configuration: MIC or Line left, positive
16 IN2_R AI Multifunction Analog Input,
or Single-ended configuration: MIC 2 or Line 2 right
or Differential configuration: MIC or Line left, negative
17 AVSS Ground Analog ground supply
18 REF AO Reference voltage output for filtering
19 MICBIAS AO Microphone bias voltage output
20 IN3_L AI Multifunction Analog Input,
or Single-ended configuration: MIC3 or Line 3 left,
or Differential configuration: MIC or Line left, positive,
or Differential configuration: MIC or Line right, negative
21 IN3_R AI Multifunction Analog Input,
or Single-ended configuration: MIC3 or Line 3 right,
or Differential configuration: MIC or Line left, negative,
or Differential configuration: MIC or Line right, positive
22 LOL AO Left line output
23 LOR AO Right line output
24 AVDD Power Analog voltage supply 1.5V–1.95V
Input when A-LDO disabled,
Filtering output when A-LDO enabled
25 HPL AO Left high power output driver
26 LDOIN / HPVDD Power LDO Input supply and Headphone Power supply 1.9V– 3.6V
27 HPR AO Right high power output driver
28 DVSS Ground Digital Ground and Chip-substrate
29 DVDD Power If LDO_SELECT Pin = 0 (D-LDO disabled)
Digital voltage supply 1.26V – 1.95V
 If LDO_SELECT Pin = 1 (D-LDO enabled)
Digital voltage supply filtering output
30 LDO_ SELECT DI D-LDO enable signal (1 = D-LDO enable, 0 = D-LDO disabled)
31 RESET DI Reset (active low)
32 GPIO / MFP5 DI Primary function:
General Purpose digital IO
Secondary function:
CLKOUT Output
INT1 Output
INT2 Output
Audio serial data bus ADC word clock output
Audio serial data bus (secondary) bit clock output
Audio serial data bus (secondary) word clock output
Digital microphone clock output
Thermal Pad Thermal Pad N/A Connect to PCB ground plane. Not internally connected.
(1) DI (Digital Input), DO (Digital Output), DIO (Digital Input/Output), AI (Analog Input), AO (Analog Output), AIO (Analog Input/Output)