SLCS135B August   2000  – January 2017 TLV3401 , TLV3402 , TLV3404

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information: TLV3401
    5. 7.5 Thermal Information: TLV3402
    6. 7.6 Thermal Information: TLV3404
    7. 7.7 Electrical Characteristics
    8. 7.8 Switching Characteristics
    9. 7.9 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Operating Voltage
      2. 8.3.2 Setting the Threshold
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
        1. 12.1.1.1 DIP Adapter EVM
        2. 12.1.1.2 Universal Op Amp EVM
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Related Links
    4. 12.4 Receiving Notification of Documentation Updates
    5. 12.5 Community Resource
    6. 12.6 Trademarks
    7. 12.7 Electrostatic Discharge Caution
    8. 12.8 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Pin Configuration and Functions

TLV3401: DBV Package
5-Pin SOT-23
Top View
TLV3401 TLV3402 TLV3404 po_dbv_lcs135.gif
TLV3401: D and P Packages
8-Pin SOIC and VSSOP
Top View
TLV3401 TLV3402 TLV3404 po_d_p_lcs135.gif

Pin Functions: TLV3401

PIN I/O DESCRIPTION
NAME TLV3401
SOT-23 SOIC, PDIP
GND 2 4 — Ground
IN– 4 2 I Negative (inverting) input
IN+ 3 3 I Positive (noninverting) input
NC — 1, 5, 8 — No internal connection (can be left floating)
OUT 1 6 O Output
VCC 5 7 — Positive power supply
TLV3402: D, DGK, and P Packages
8-PIN SOIC, PDIP, and VSSOP
Top View
TLV3401 TLV3402 TLV3404 po_d_dgk_p_lcs135.gif

Pin Functions: TLV3402

PIN I/O DESCRIPTION
NAME TLV3402
SOIC, PDIP, VSSOP
GND 4 — Ground
1IN– 2 I Inverting input, channel 1
2IN– 6 I Inverting input, channel 2
1IN+ 3 I Noninverting input, channel 1
2IN+ 5 I Noninverting input, channel 2
1OUT 1 O Output, channel 1
2OUT 7 O Output, channel 2
VCC 8 — Positive power supply
TLV3404: D, N, and PW Packages
14-PIN SOIC, PDIP, TSSOP
Top View
TLV3401 TLV3402 TLV3404 po_d_n_pw_lcs135.gif

Pin Functions: TLV3404

PIN I/O DESCRIPTION
NAME TLV3404
SOIC, PDIP, TSSOP
GND 11 — Ground
1IN– 2 I Inverting input, channel 1
2IN– 6 I Inverting input, channel 2
3IN– 9 I Inverting input, channel 3
4IN– 13 I Inverting input, channel 4
1IN+ 3 I Noninverting input, channel 1
2IN+ 5 I Noninverting input, channel 2
3IN+ 10 I Noninverting input, channel 3
4IN+ 12 I Noninverting input, channel 4
1OUT 1 O Output, channel 1
2OUT 7 O Output, channel 2
3OUT 8 O Output, channel 3
4OUT 14 O Output, channel 4
VCC 4 — Positive power supply