JAJSOM8A
October 2022 – December 2023
TLV3801-Q1
,
TLV3802-Q1
PRODMIX
1
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Thermal Information
6.4
Recommended Operating Conditions
6.5
Electrical Characteristics
6.6
Timing Diagrams
6.7
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.4
Device Functional Modes
7.4.1
Inputs
7.4.2
LVDS Output
8
Application and Implementation
8.1
Application Information
8.1.1
Capacitive Loads
8.1.2
Hysteresis
8.2
Typical Application
8.2.1
Optical Receiver
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.3
Application Performance Plots
8.2.2
Non-Inverting Comparator With Hysteresis
8.2.2.1
Design Requirements
8.2.2.2
Detailed Design Procedure
8.2.2.3
Application Performance Plots
8.2.3
Logic Clock Source to LVDS Transceiver
8.2.4
External Trigger Function for Oscilloscopes
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Device Support
9.1.1
Development Support
9.2
ドキュメントの更新通知を受け取る方法
9.3
サポート・リソース
9.4
Trademarks
9.5
静電気放電に関する注意事項
9.6
用語集
10
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DSG|8
MPDS308C
サーマルパッド・メカニカル・データ
DSG|8
QFND569C
発注情報
jajsom8a_oa
jajsom8a_pm
9.1
Device Support