JAJSEJ7B January   2018  – July 2018 TLV6713

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      代表的なアプリケーション
  4. 4 改訂履歴
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Pin (SENSE)
      2. 8.3.2 Output Pin (OUT)
    4. 8.4 Device Functional Modes
      1. 8.4.1 Normal Operation (VDD > UVLO)
      2. 8.4.2 Undervoltage Lockout (V(POR) < VDD < UVLO)
      3. 8.4.3 Power On Reset (VDD < V(POR))
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Input and Output Configurations
      2. 9.1.2 Immunity to Input Pin Voltage Transients
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Resistor Divider Selection
        2. 9.2.2.2 Pullup Resistor Selection
        3. 9.2.2.3 Input Supply Capacitor
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 デバイス・サポート
      1. 12.1.1 開発サポート
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.5 Electrical Characteristics

Over the operating temperature range of TJ = –40°C to +125°C, 1.8 V ≤ VDD < 36 V, and pullup resistor RP = 100 kΩ (unless otherwise noted). Typical values are at TJ = 25°C and VDD = 12 V.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V(POR) Power-on reset voltage(1) VOL ≤ 0.2 V 0.8 V
VIT– SENSE pin negative input threshold voltage VDD = 1.8 V to 36 V 397 400 403 mV
VIT+ SENSE pin positive input threshold voltage VDD = 1.8 V to 36 V 400 405.5 413 mV
VHYS SENSE pin hysteresis voltage
(HYS = VIT+ – VIT–)		 2 5.5 12 mV
VOL Low-level output voltage VDD = 1.8 V, IOUT = 3 mA 130 250 mV
VDD = 5 V, IOUT = 5 mA 150 250
IIN Input current (at SENSE pin) VDD = 1.8 V and 36 V, VSENSE = 6.5 V –25 +1 +25 nA
VDD = 1.8 V and 36 V, VSENSE = 0.1 V –15 +1 +15
ID(leak) Open-drain leakage current VDD = 1.8 V and 36 V, VOUT = 25 V 10 300 nA
IDD Supply current VDD = 1.8 V – 36 V 8 11 µA
UVLO Undervoltage lockout(2) VDD falling 1.3 1.5 1.7 V
(1) The lowest supply voltage (VDD) at which output is active; tr(VDD) > 15 µs/V. If less than V(POR), the output is undetermined.
(2) When VDD falls below UVLO, OUT is driven low. The output cannot be determined if less than V(POR).