The TLV700 series of low-dropout (LDO) linear regulators are low quiescent current devices with excellent line and load transient performance. These LDOs are designed for power-sensitive applications. A precision bandgap and error amplifier provides overall 2% accuracy. Low output noise, very high power-supply rejection ratio (PSRR), and low dropout voltage make this series of devices ideal for most battery-operated handheld equipment. All device versions have thermal shutdown and current limit for safety.
Furthermore, these devices are stable with an effective output capacitance of only 0.1 μF. This feature enables the use of cost-effective capacitors that have higher bias voltages and temperature derating. The devices regulate to specified accuracy with no output load.
The TLV700 series of LDOs are available in 1.5-mm × 1.5-mm SON-6, SOT-5, and SC70 packages.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
TL700xx | SC70 (5) | 2.00 mm × 1.25 mm |
SOT (5) | 2.90 mm × 1.60 mm | |
WSON (6) | 1.50 mm × 1.50 mm |
Changes from D Revision (October 2012) to E Revision
Changes from C Revision (July 2011) to D Revision
Changes from B Revision (December, 2010) to C Revision
Changes from A Revision (April, 2010) to B Revision
PIN | I/O | DESCRIPTION | |||
---|---|---|---|---|---|
NAME | WSON | SC70 | SOT | ||
IN | 1 | 1 | 1 | I | Input pin. A small, 1-μF ceramic capacitor is recommended from this pin to ground to assure stability and good transient performance. See for more details. |
GND | 2 | 2 | 2 | — | Ground pin |
EN | 6 | 3 | 3 | I | Enable pin. Driving EN over 0.9 V turns on the regulator. Driving EN below 0.4 V puts the regulator into shutdown mode and reduces operating current to 1 μA, nominal. |
NC | 4, 5 | 4 | 4 | — | No connection. This pin can be tied to ground to improve thermal dissipation. |
OUT | 3 | 5 | 5 | O | Regulated output voltage pin. A small, 1-μF ceramic capacitor is needed from this pin to ground to assure stability. See for more details. |
MIN | MAX | UNIT | ||
---|---|---|---|---|
Voltage | VIN | –0.3 | 6 | V |
VEN | –0.3 | 6(2) | ||
VOUT | –0.3 | 6 | ||
Maximum output current | IOUT | Internally limited | ||
Output short-circuit duration | Indefinite | |||
Temperature | Operating junction, TJ | –55 | 150 | °C |
Storage, Tstg | –55 | 150 |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) | ±2000 | V |
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) | ±500 |
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
VIN | 2 | 5.5 | V | ||
VOUT | 1.2 | 4.8 | V | ||
IOUT | 0 | 200 | mA |
THERMAL METRIC(1) | TLV700 | UNIT | |||
---|---|---|---|---|---|
DCK [SC70] | DDC [SOT] | DSE [WSON] | |||
5 PINS | 5 PINS | 6 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 307.6 | 235.9 | 321.3 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 79.1 | 61.9 | 207.9 | |
RθJB | Junction-to-board thermal resistance | 93.7 | 54 | 281.5 | |
ψJT | Junction-to-top characterization parameter | 1.3 | 0.8 | 42.4 | |
ψJB | Junction-to-board characterization parameter | 92.8 | 53.4 | 284.8 | |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | n/a | n/a | 142.3 |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |||
---|---|---|---|---|---|---|---|---|
VIN | Input voltage range | 2 | 5.5 | V | ||||
VOUT | DC output accuracy | –40°C ≤ TJ ≤ +125°C | –2% | 2% | ||||
ΔVOUT(ΔVIN) | Line regulation | VOUT(nom) + 0.3 V ≤ VIN ≤ 5.5 V, IOUT = 10 mA |
1 | 5 | mV | |||
ΔVOUT(ΔIOUT) | Load regulation | 0 mA ≤ IOUT ≤ 200 mA | 1 | 15 | mV | |||
VDO | Dropout voltage(1) | VIN = 0.98 × VOUT(nom), IOUT = 50 mA, VOUT = 2.8 V |
43 | mV | ||||
VIN = 0.98 × VOUT(nom), IOUT = 100 mA, VOUT = 2.8 V |
85 | |||||||
VIN = 0.98 × VOUT(nom), IOUT = 200 mA, VOUT = 2.35 V |
175 | 250 | ||||||
ICL | Output current limit | VOUT = 0.9 × VOUT(nom) | 220 | 860 | mA | |||
IGND | Ground pin current | IOUT = 0 mA | 31 | 55 | μA | |||
IOUT = 200 mA, VIN = VOUT + 0.5 V | 270 | |||||||
ISHDN | Ground pin current (shutdown) | VEN ≤ 0.4 V, VIN = 2 V | 400 | nA | ||||
VEN ≤ 0.4 V, 2 V ≤ VIN ≤ 4.5 V | 1 | 2 | μA | |||||
PSRR | Power-supply rejection ratio | VIN = 2.3 V, VOUT = 1.8 V, IOUT = 10 mA, f = 1 kHz |
68 | dB | ||||
Vn | Output noise voltage | BW = 100 Hz to 100 kHz, VIN = 2.3 V, VOUT = 1.8 V, IOUT = 10 mA |
48 | μVRMS | ||||
tSTR | Start-up time(2) | COUT = 1 μF, IOUT = 200 mA | 100 | μs | ||||
VEN(high) | Enable pin high (enabled) | 0.9 | VIN | V | ||||
VEN(low) | Enable pin low (disabled) | 0 | 0.4 | V | ||||
IEN | Enable pin current | VIN = VEN = 5.5 V | 0.04 | 0.5 | μA | |||
UVLO | Undervoltage lockout | VIN rising | 1.9 | V | ||||
Tsd | Thermal shutdown temperature | Shutdown, temperature increasing | 160 | °C | ||||
Reset, temperature decreasing | 140 | |||||||
TJ | Operating junction temperature | –40 | 125 | °C |