SLVSA00E September   2009  – April 2015 TLV700

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Internal Current Limit
      2. 7.3.2 Shutdown
      3. 7.3.3 Dropout Voltage
      4. 7.3.4 Undervoltage Lockout (UVLO)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input and Output Capacitor Requirements
        2. 8.2.2.2 Transient Response
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
    3. 10.3 Thermal Protection
    4. 10.4 Power Dissipation
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Evaluation Modules
        2. 11.1.1.2 Spice Models
      2. 11.1.2 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ

6 Specifications

6.1 Absolute Maximum Ratings

over operating junction temperature range (unless otherwise noted) (1)
MIN MAX UNIT
Voltage VIN –0.3 6 V
VEN –0.3 6(2)
VOUT –0.3 6
Maximum output current IOUT Internally limited
Output short-circuit duration Indefinite
Temperature Operating junction, TJ –55 150 °C
Storage, Tstg –55 150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) VEN absolute maximum rating is VIN + 0.3 V or 6 V, whichever is less.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±2000 V
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) ±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VIN 2 5.5 V
VOUT 1.2 4.8 V
IOUT 0 200 mA

6.4 Thermal Information

THERMAL METRIC(1) TLV700 UNIT
DCK [SC70] DDC [SOT] DSE [WSON]
5 PINS 5 PINS 6 PINS
RθJA Junction-to-ambient thermal resistance 307.6 235.9 321.3 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 79.1 61.9 207.9
RθJB Junction-to-board thermal resistance 93.7 54 281.5
ψJT Junction-to-top characterization parameter 1.3 0.8 42.4
ψJB Junction-to-board characterization parameter 92.8 53.4 284.8
RθJC(bot) Junction-to-case (bottom) thermal resistance n/a n/a 142.3
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

At VIN = VOUT(nom) + 0.3 V or 2 V (whichever is greater); IOUT = 10 mA, VEN = 0.9 V, COUT = 1 μF, and TJ = –40°C to +125°C, unless otherwise noted. Typical values are at TJ = 25°C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIN Input voltage range 2 5.5 V
VOUT DC output accuracy –40°C ≤ TJ ≤ +125°C –2% 2%
ΔVOUT(ΔVIN) Line regulation VOUT(nom) + 0.3 V ≤ VIN ≤ 5.5 V,
IOUT = 10 mA		 1 5 mV
ΔVOUT(ΔIOUT) Load regulation 0 mA ≤ IOUT ≤ 200 mA 1 15 mV
VDO Dropout voltage(1) VIN = 0.98 × VOUT(nom), IOUT = 50 mA,
VOUT = 2.8 V		 43 mV
VIN = 0.98 × VOUT(nom), IOUT = 100 mA,
VOUT = 2.8 V		 85
VIN = 0.98 × VOUT(nom), IOUT = 200 mA,
VOUT = 2.35 V		 175 250
ICL Output current limit VOUT = 0.9 × VOUT(nom) 220 860 mA
IGND Ground pin current IOUT = 0 mA 31 55 μA
IOUT = 200 mA, VIN = VOUT + 0.5 V 270
ISHDN Ground pin current (shutdown) VEN ≤ 0.4 V, VIN = 2 V 400 nA
VEN ≤ 0.4 V, 2 V ≤ VIN ≤ 4.5 V 1 2 μA
PSRR Power-supply rejection ratio VIN = 2.3 V, VOUT = 1.8 V,
IOUT = 10 mA, f = 1 kHz		 68 dB
Vn Output noise voltage BW = 100 Hz to 100 kHz,
VIN = 2.3 V, VOUT = 1.8 V, IOUT = 10 mA		 48 μVRMS
tSTR Start-up time(2) COUT = 1 μF, IOUT = 200 mA 100 μs
VEN(high) Enable pin high (enabled) 0.9 VIN V
VEN(low) Enable pin low (disabled) 0 0.4 V
IEN Enable pin current VIN = VEN = 5.5 V 0.04 0.5 μA
UVLO Undervoltage lockout VIN rising 1.9 V
Tsd Thermal shutdown temperature Shutdown, temperature increasing 160 °C
Reset, temperature decreasing 140
TJ Operating junction temperature –40 125 °C
(1) VDO is measured for devices with VOUT(nom) ≥ 2.35 V.
(2) Start-up time = time from EN assertion to 0.98 × VOUT(nom).

6.6 Typical Characteristics

Over operating temperature range (TJ = –40°C to +125°C), VIN = VOUT(nom) + 0.5 V or 2 V, whichever is greater; IOUT = 10 mA, VEN = VIN, COUT = 1 μF, unless otherwise noted. Typical values are at TJ = 25°C.
TLV700 tc_line_reg_10ma_lvsa00.gif
Figure 1. TLV70018 Line Regulation
TLV700 tc_load_reg_018_lvsa00.gif
Figure 3. TLV70018 Load Regulation
TLV700 tc_vdo_iout_lvsa00.gif
Figure 5. Dropout Voltage vs Output Current, VOUT = 4.8 V
TLV700 tc_ignd_vin_0ma_lvsa00.gif
Figure 7. TLV70018 Ground Pin Current vs Input Voltage
TLV700 tc_ignd_temp_lvsa00.gif
Figure 9. TLV70018 Ground Pin Current vs Temperature
TLV700 tc_psrr_fqcy_05v_lvsa00.gif
Figure 11. TLV70018 Power-Supply Ripple Rejection vs Frequency
TLV700 tc_output_spec_noise_lvsa00.gif
Figure 13. TLV70018 Output Spectral Noise Density vs Output Voltage
TLV700 tc_load_tr_10_lvsa00.gif
Figure 15. TLV70018 Load Transient Response
TLV700 tc_line_tr_200-1_lvsa00.gif
Figure 17. TLV70018 Line Transient Response
TLV700 tc_line_tr_200-2_lvsa00.gif
Figure 19. TLV70018 Line Transient Response
TLV700 tc_line_reg_200ma_lvsa00.gif
Figure 2. TLV70018 Line Regulation
TLV700 tc_vdo_vin_lvsa00.gif
Figure 4. Dropout Voltage vs Input Voltage
TLV700 tc_vout_temp_lvsa00.gif
Figure 6. TLV70018 Output Voltage vs Temperature
TLV700 tc_ignd_load_lvsa00.gif
Figure 8. TLV70018 Ground Pin Current vs Load
TLV700 tc_ishut_vin_lvsa00.gif
Figure 10. TLV70018 Shutdown Current vs Input Voltage
TLV700 tc_psrr_vin_lvsa00.gif
Figure 12. TLV70018 Power-Supply Ripple Rejection vs Input Voltage
TLV700 tc_load_tr_150_lvsa00.gif
Figure 14. TLV70018 Load Transient Response
TLV700 tc_load_tr_50_lvsa00.gif
Figure 16. TLV70018 Load Transient Response
TLV700 tc_line_tr_1_lvsa00.gif
Figure 18. TLV70018 Line Transient Response
TLV700 tc_pupd_lvsa00.gif
Figure 20. TLV70018 VIN Ramp-Up, Ramp-Down Response