JAJSF56D
April 2018 – October 2023
TLV758P
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Undervoltage Lockout (UVLO)
6.3.2
Shutdown
6.3.3
Foldback Current Limit
6.3.4
Thermal Shutdown
6.4
Device Functional Modes
6.4.1
Device Functional Mode Comparison
6.4.2
Normal Operation
6.4.3
Dropout Operation
6.4.4
Disabled
7
Application and Implementation
7.1
Application Information
7.1.1
Adjustable Device Feedback Resistors
7.1.2
Input and Output Capacitor Selection
7.1.3
Dropout Voltage
7.1.4
Exiting Dropout
7.1.5
Reverse Current
7.1.6
Power Dissipation (PD)
7.1.7
Feed-Forward Capacitor (CFF)
7.1.8
Start-Up Sequencing
7.2
Typical Application
7.2.1
Design Requirements
7.2.2
Detailed Design Procedure
7.2.2.1
Input Current
7.2.2.2
Thermal Dissipation
7.2.3
Application Curve
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.2
Layout Examples
8
Device and Documentation Support
8.1
Documentation Support
8.1.1
Device Nomenclature
8.1.2
Related Documentation
8.2
ドキュメントの更新通知を受け取る方法
8.3
サポート・リソース
8.4
Trademarks
8.5
静電気放電に関する注意事項
8.6
用語集
9
Revision History
10
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DRV|6
MPDS216E
DBV|5
MPDS018T
サーマルパッド・メカニカル・データ
DRV|6
QFND087M
発注情報
jajsf56d_oa
jajsf56d_pm
5
Specifications