JAJSF56D April   2018  – October 2023 TLV758P

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Undervoltage Lockout (UVLO)
      2. 6.3.2 Shutdown
      3. 6.3.3 Foldback Current Limit
      4. 6.3.4 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Device Functional Mode Comparison
      2. 6.4.2 Normal Operation
      3. 6.4.3 Dropout Operation
      4. 6.4.4 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Adjustable Device Feedback Resistors
      2. 7.1.2 Input and Output Capacitor Selection
      3. 7.1.3 Dropout Voltage
      4. 7.1.4 Exiting Dropout
      5. 7.1.5 Reverse Current
      6. 7.1.6 Power Dissipation (PD)
      7. 7.1.7 Feed-Forward Capacitor (CFF)
      8. 7.1.8 Start-Up Sequencing
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Input Current
        2. 7.2.2.2 Thermal Dissipation
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Examples
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Device Nomenclature
      2. 8.1.2 Related Documentation
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

4 Pin Configuration and Functions

GUID-5302B591-0084-4E24-8E68-832499948D8E-low.svgFigure 4-1 DRV Package,6-Pin Adjustable WSON(Top View)
GUID-35461B79-9774-47DE-BB99-8451835C690D-low.svgFigure 4-2 DBV Package,5-Pin Adjustable SOT-23(Top View)
Table 4-1 Pin Functions
PIN I/O DESCRIPTION
NAME NO.
DNC 5 — Do not connect
EN 4 Input Enable pin. Drive EN greater than VEN(HI) to turn on the regulator.
Drive EN less than VEN(LO) to put the LDO into shutdown mode.
FB 2 — This pin is used as an input to the control loop error amplifier and is used to set the output voltage of the LDO.
GND 3 — Ground pin
IN 6 Input Input pin. For best transient response and to minimize input impedance, use the recommended value or larger ceramic capacitor from IN to ground as listed in the Recommended Operating Conditions table and the Input and Output Capacitor Selection section. Place the input capacitor as close to the output of the device as possible.
OUT 1 Output Regulated output voltage pin. A capacitor is required from OUT to ground for stability. For best transient response, use the nominal recommended value or larger ceramic capacitor from OUT to ground; see the Recommended Operating Conditions table and the Input and Output Capacitor Selection section. Place the output capacitor as close to output of the device as possible.
Thermal pad Pad — Connect the thermal pad to a large area GND plane for improved thermal performance.