JAJSSP3 April   2024 TLV772

ADVANCE INFORMATION  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Dropout Voltage
      2. 6.3.2 Active Discharge
      3. 6.3.3 Foldback Current Limit
      4. 6.3.4 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
      3. 6.4.3 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Recommended Capacitor Types
      2. 7.1.2 Input and Output Capacitor Requirements
    2. 7.2 Typical Application
      1. 7.2.1 Application
      2. 7.2.2 Design Requirements
      3. 7.2.3 Detailed Design Procedure
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Examples
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 ドキュメントの更新通知を受け取る方法
    4. 8.4 サポート・リソース
    5. 8.5 Trademarks
    6. 8.6 静電気放電に関する注意事項
    7. 8.7 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DBV|5
サーマルパッド・メカニカル・データ
発注情報

4 Pin Configuration and Functions

GUID-35461B79-9774-47DE-BB99-8451835C690D-low.svgFigure 4-1 DBV Package,5-Pin SOT-23(Top View)
Table 4-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME SOT-23
EN 3 I Enable input. A low voltage (< VEN(LOW)) on this pin turns the regulator off and discharges the output pin to GND. A high voltage (> VEN(HI)) on this pin enables the regulator output.
FB 4 I Feedback pin. Input to the control-loop error amplifier. This pin sets the output voltage of the device with the use of external resistors.
GND 2 G Ground pin.
IN 1 I Input voltage supply. For best transient response and to minimize input impedance, use the nominal value or larger capacitor from IN to ground, as listed in the Recommended Operating Conditions table. Place the input capacitor as close to the IN and GND pins of the device as possible.
OUT 5 O Regulated output voltage. A low equivalent series resistance (ESR) capacitor is required from OUT to ground for stability. For best transient response, use the nominal recommended value or larger capacitor listed in the Recommended Operating Conditions table. Place the output capacitor as close to the OUT and GND pins of the device as possible. An internal pulldown resistor prevents a charge from remaining on VOUT when the regulator is in shutdown mode (VEN< VEN(LOW)).
(1) I = input, O = output, I/O = input or output, and G = ground.