JAJSN69C December 2023 – October 2024 TLV773
PRODUCTION DATA
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For this design example, the 3.3V output version (TLV77333) is selected. A nominal 4.0V input supply is assumed. Use a minimum 1μF input capacitor to minimize the effect of resistance and inductance between the 4.0V source and the LDO input. Use a minimum 0.47μF output capacitance for stability and good load transient response. The dropout voltage (VDO) is less than 250mV maximum at a 3.3V output voltage and 300mA output current. Thus, there are no dropout issues with a minimum input voltage of 3.8V (4.0V − 5%) and a maximum 200mA output current.