SBOSAM4 December   2024 TLV9141 , TLV9144

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information for Single Channel
    5. 5.5 Thermal Information for Dual Channel
    6. 5.6 Thermal Information for Quad Channel
    7. 5.7 Electrical Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Input Protection Circuitry
      2. 6.3.2 Common-Mode Voltage Range
      3. 6.3.3 EMI Rejection
      4. 6.3.4 Phase Reversal Protection
      5. 6.3.5 Electrical Overstress
      6. 6.3.6 Overload Recovery
      7. 6.3.7 Typical Specifications and Distributions
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Low-Side Current Measurement
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 TINA-TI (Free Software Download)
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5.7 Electrical Characteristics

For VS = (V+) – (V–) = 2.7V to 18V (±1.35V to ±9V) at TA = 25°C, RL = 10kΩ connected to VS / 2, VCM = VS / 2, and VOUT = VS / 2, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VOS Input offset voltage VCM = V– ±0.265 ±1 mV
TA = –40°C to 125°C ±1.5 mV
dVOS/dT Input offset voltage drift TA = –40°C to 125°C ±0.2 µV/℃
PSRR Input offset voltage versus power supply VCM = V–, VS = 5V to 18V TA = –40°C to 125°C ±0.112 ±1 µV/V
139 115 dB
VCM = V–, VS = 2.7V to 18V(1) TA = –40°C to 125°C ±0.1 ±1.8 µV/V
140 114 dB
Channel separation f = 0Hz 5 µV/V
106 dB
INPUT BIAS CURRENT
IB Input bias current(1) (2) ±0.5 ±10 pA
IOS Input offset current(1) (2) ±0.5 ±10 pA
NOISE
EN Input voltage noise f = 0.1Hz to 10Hz   3.4 µVPP
  0.5   µVRMS
eN Input voltage noise density f = 1kHz 50   nV/√Hz
iN Input current noise f = 1kHz   0.5   fA/√Hz
INPUT VOLTAGE RANGE
VCM Common-mode voltage range (V–) – 0.2 (V+) + 0.2 V
CMRR Common-mode rejection ratio VS = 18V, (V–) – 0.1V < VCM < (V+) – 2V (Main input pair) 99 108 dB
TA = –40°C to 125°C 99
VS = 5V, (V–) – 0.1V < VCM < (V+) – 2V (Main input pair) 86 94
TA = –40°C to 125°C 85
VS = 2.7V, (V–) – 0.1V < VCM < (V+) – 2V (Main input pair)(1) 75 85
TA = –40°C to 125°C 74
VS = 2.7V to 18V, (V+) – 1V < VCM < (V+) + 0.1V (Aux input pair)(1) 95
TA = –40°C to 125°C 72
VS = 18V, (V–) – 0.2V < VCM < (V+) + 0.2V (Both input pairs)(1) 80 91
TA = –40°C to 125°C 79
(V+) – 2V < VCM < (V+) – 1V TA = –40°C to 125°C See Input Offset Voltage vs Common-Mode Voltage
INPUT CAPACITANCE
ZID Differential 500 || 3 GΩ || pF
ZICM Common-mode 5 || 1 TΩ || pF
OPEN-LOOP GAIN
AOL Open-loop voltage gain VS = 18V, VCM = V–,
(V–) + 0.1V < VO < (V+) – 0.1V		 110 135 dB
TA = –40°C to 125°C 125
VS = 5V, VCM = V–,
(V–) + 0.1V < VO < (V+) – 0.1V		 105 130
TA = –40°C to 125°C 125
VS = 2.7V, VCM = V–,
(V–) + 0.1V < VO < (V+) – 0.1V(1)		 100 120
TA = –40°C to 125°C 115
FREQUENCY RESPONSE
GBW Gain-bandwidth product RL = 1MΩ 125 kHz
SR Slew rate VS = 18V, G = +1, CL = 20pF 0.1 V/µs
tS Settling time To 0.01%, VS = 18V, VSTEP = 10V , G = +1, CL = 20pF 135 µs
To 0.01%, VS = 18V, VSTEP = 2V , G = +1, CL = 20pF 68
To 0.1%, VS = 18V, VSTEP = 10V , G = +1, CL = 20pF 121
To 0.1%, VS = 18V, VSTEP = 2V , G = +1, CL = 20pF 51
PM Phase margin G = +1, RL = 100kΩ, CL = 100pF 40 °
toverload Overload recovery time VIN  × gain > VS 35 µs
THD+N Total harmonic distortion + noise (3) VS = 18V, VO = 1VRMS, G = 1, f = 1kHz, RL = 1MΩ 0.07 %
73 dB
VS = 18V, VO = 1VRMS, G = 1, f = 1kHz, RL = 100kΩ 0.02 %
63 dB
OUTPUT
  Voltage output swing from rail Positive and negative rail headroom VS = 18V, RL = no load(1)   5 10 mV
VS = 18V, RL = 10kΩ   50 60
VS = 18V, RL = 2kΩ   266 300
VS = 2.7V, RL = no load(1)   1 5
VS = 2.7V, RL = 10kΩ   12 20
VS = 2.7V, RL = 2kΩ   58 80
ISC Short-circuit current ±40 mA
CLOAD Capacitive load drive See Phase Margin vs Capacitive Load pF
ZO Open-loop output impedance IO = 0A See Open-Loop Output Impedance vs Frequency Ω
POWER SUPPLY
IQ Quiescent current per amplifier VCM = V–, IO = 0A 7 9 µA
TA = –40°C to 125°C 9.5
(1) Max value is specified by characterization only.
(2) Input differential voltages greater than 2.5V can cause increased IB.
(3) Third-order filter; bandwidth = 80kHz at –3 dB.