JAJSN58 April   2022 TLVM13620

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  System Characteristics
    7. 7.7  Typical Characteristics
    8. 7.8  Typical Characteristics — 2-A Device (VIN = 12 V)
    9. 7.9  Typical Characteristics — 2-A Device (VIN = 24 V)
    10. 7.10 Typical Characteristics — 2-A Device (VIN = 36 V)
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Input Voltage Range
      2. 8.3.2  Adjustable Output Voltage (FB)
      3. 8.3.3  Input Capacitors
      4. 8.3.4  Output Capacitors
      5. 8.3.5  Switching Frequency (RT)
      6. 8.3.6  Output ON and OFF Enable (EN) and VIN UVLO
      7. 8.3.7  Power-Good Monitor (PG)
      8. 8.3.8  Internal LDO, VCC Output, and VLDOIN Input
      9. 8.3.9  Overcurrent Protection (OCP)
      10. 8.3.10 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Standby Mode
      3. 8.4.3 Active Mode
  9. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Design 1 — 2-A Synchronous Buck Regulator for Industrial Applications
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Custom Design With WEBENCH® Tools
          2. 9.2.1.2.2 Output Voltage Setpoint
          3. 9.2.1.2.3 Switching Frequency Selection
          4. 9.2.1.2.4 Input Capacitor Selection
          5. 9.2.1.2.5 Output Capacitor Selection
          6. 9.2.1.2.6 Other Connections
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Design 2 — Inverting Buck-Boost Regulator with a –5-V Output
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
          1. 9.2.2.2.1 Output Voltage Setpoint
          2. 9.2.2.2.2 IBB Maximum Output Current
          3. 9.2.2.2.3 Switching Frequency Selection
          4. 9.2.2.2.4 Input Capacitor Selection
          5. 9.2.2.2.5 Output Capacitor Selection
          6. 9.2.2.2.6 Other Connections
          7. 9.2.2.2.7 EMI
            1. 9.2.2.2.7.1 EMI Plots
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
      1. 11.2.1 Package Specifications
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
      2. 12.1.2 Development Support
        1. 12.1.2.1 Custom Design With WEBENCH® Tools
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 サポート・リソース
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.3.3 Input Capacitors

Input capacitors are required to limit the input ripple voltage to the module due to switching-frequency AC currents. TI recommends using ceramic capacitors to provide low impedance and high RMS current rating over a wide temperature range. Equation 2 gives the input capacitor RMS current. The highest input capacitor RMS current occurs at D = 0.5, at which point, the RMS current rating of the capacitors must be greater than half the output current.

Equation 2. GUID-61BCEB66-A882-40B7-9A98-A392683BDB55-low.gif

where

  • D = VOUT / VIN is the module duty cycle.

Ideally, the DC and AC components of the input current to the buck stage are provided by the input voltage source and the input capacitors, respectively. Neglecting inductor ripple current, the input capacitors source current of amplitude (IOUT – IIN) during the D interval and sink IIN during the 1 – D interval. Thus, the input capacitors conduct a square-wave current of peak-to-peak amplitude equal to the output current. The resulting capacitive component of the AC ripple voltage is a triangular waveform. Together with the ESR-related ripple component, Equation 3 gives the peak-to-peak ripple voltage amplitude.

Equation 3. GUID-82082AEC-FC37-4024-BC69-18B9142E1C69-low.gif

Equation 4 gives the input capacitance required for a particular load current.

Equation 9. GUID-DD1C55AB-D737-4756-9A7D-C9FC2F9E8B07-low.gif

where

  • ΔVIN is the input voltage ripple specification.

The TLVM13620 requires a minimum of 2 × 4.7-µF ceramic type input capacitance. Only use high-quality ceramic type capacitors with sufficient voltage and temperature rating. The ceramic input capacitors provide a low impedance source to the converter in addition to supplying the ripple current and isolating switching noise from other circuits. Additional capacitance can be required for applications with transient load requirements. The voltage rating of the input capacitors must be greater than the maximum input voltage. To compensate for the derating of ceramic capacitors, TI recommends a voltage rating of twice the maximum input voltage or placing multiple capacitors in parallel. Table 8-2 includes a preferred list of capacitors by vendor.

Table 8-2 Recommended Input Capacitors
Vendor(1) Dielectric Part Number Case Size Capacitor Characteristics
Voltage Rating (V) Capacitance (µF)(2)
TDK X7R C3216X7R1H475K160AC 1206 50 4.7
Murata X7R GRM31CR71H475KA12L 1206 50 4.7
TDK X7R CGA6P3X7R1H475K250AB 1210 50 4.7
Murata X7S GCM31CC71H475KA03L 1206 50 4.7
(1) Consult capacitor suppliers regarding availability, material composition, RoHS and lead-free status, and manufacturing process requirements for any capacitors identified in this table. See the Third-Party Products Disclaimer.
(2) Nameplate capacitance values (the effective values are lower based on the applied DC voltage and temperature.)