JAJSP86B November 2023 – June 2024 TMAG3001
PRODUCTION DATA
The TMAG3001 has a standard bidirectional I2C interface that is controlled by a controller device to be configured or read the status of the device. Each target on the I2C bus has a specific device address to differentiate between other target devices that are on the same I2C bus. Many target devices require configuration upon start-up to set the behavior of the device. This is typically done when the controller accesses internal register maps of the target, which have unique register addresses. A device can have one or multiple registers where data is stored, written, or read. At the start bit of an I2C transaction, the conversion result registers are locked to the most recent completed conversion to prevent the results from changing mid transaction. If a conversion is completed mid I2C transaction, the device updates the results register with the new values immediately after the stop condition. The TMAG3001 supports transmission data rates up to 1MHz.
The physical I2C interface consists of the serial clock (SCL) and serial data (SDA) lines. Both SDA and SCL lines must be connected to a supply through a pullup resistor. The size of the pullup resistor is determined by the amount of capacitance on the I2C lines and the communication frequency. For further details, see the I2C Pullup Resistor Calculation application report. Data transfer can only be initiated when the bus is idle. A bus is considered idle if both SDA and SCL lines are high after a STOP condition.
The following is the general procedure for a controller to access a target device: