JAJSP86B November 2023 – June 2024 TMAG3001
PRODUCTION DATA
To write on the I2C bus, the controller sends a START condition on the bus with the address of the target, as well as the last bit (the R/W bit) set to 0b, which signifies a write. The target acknowledges, letting the controller know the target is ready. After this, the controller starts sending the control register data to the target until the controller has sent all the data necessary, and the controller terminates the transmission with a STOP condition. The device auto increments the register address pointer after each byte.